Dual metal gate CMOS devices

Abstract

A method of fabricating a dual metal gate CMOS includes forming a gate oxide in a gate region and depositing a place-holder gate in each of a n-well and p-well; removing the place-holder gate and gate oxide; depositing a high-k dielectric in the gate region; depositing a first metal in the gate region of the p-well; depositing a second metal in the gate region of each of the n-well and p-well; and insulating and metallizing the structure. A dual metal gate CMOS of the invention includes PMOS transistor and a NMOS transistor. In the NMOS, a gate includes a high-k cup, a first metal cup formed in the high-k cup, and a second metal gate formed in the first metal cup. In the PMOS, a gate includes a high-k cup and a second metal gate formed in the high-k cup.

We claim:  
     
         1 . A method of fabricating a dual metal gate CMOS, comprising: 
 preparing a silicon substrate to form device areas, wherein each device area includes an n-well and a p-well;    forming a gate oxide in a gate region and depositing a place-holder gate in each of the n-well and p-well;    implanting ions to form a source region and a drain region in each of the n-well and p-well;    removing the place-holder gate and gate oxide;    depositing a high-k dielectric in the gate region;    depositing a first metal in the gate region of the p-well;    depositing a second metal in the gate region of each of the n-well and p-well; and    insulating and metallizing the structure.    
     
     
         2 . The method of  claim 1  wherein said depositing a place-holder gate includes depositing a place-holder material to a thickness of between about 150 nm to 500 nm.  
     
     
         3 . The method of  claim 2  wherein said depositing a place-holder material includes depositing Si 3 N 4 .  
     
     
         4 . The method of  claim 2  which further includes depositing an oxide layer before said removing, wherein said oxide layer is between about 1.5× to 2.0× the thickness of the placeholder gate.  
     
     
         5 . The method of  claim 1  wherein said depositing a high-k material includes depositing a high-k material taken from the group of materials consisting of HfO 2  and ZrO 2 .  
     
     
         6 . The method of  claim 1  wherein said depositing a high-k material includes depositing high-k material to a thickness of between about 3 nm to 8 nm.  
     
     
         7 . The method of  claim 1  wherein said depositing a first metal includes patterning the gate area of the p-well and depositing a first metal, patterning the first metal and selectively etching the first metal.  
     
     
         8 . The method of  claim 1  wherein said depositing a first metal includes depositing a layer of the first metal over the entire device area, and patterning the device area to leave a first metal cup in the gate region of the p-well.  
     
     
         9 . The method of  claim 1  wherein said depositing a first metal includes depositing a metal taken from the group of metals consisting of platinum and iridium.  
     
     
         10 . The method of  claim 1  wherein said depositing a second metal includes depositing a metal taken from the group of metals consisting of aluminum, zirconium, molybdenum, niobium, thallium, thallium nitride and vanadium.  
     
     
         11 . A method of fabricating a dual metal gate CMOS, comprising: 
 preparing a silicon substrate to form device areas, wherein each device area includes an n-well and a p-well;    forming a gate oxide in a gate region and depositing a place-holder gate in each of the n-well and p-well, including depositing a Si 3 N, place-holder material to a thickness of between about 150 nm to 500 nm;    implanting ions to form a source region and a drain region in each of the n-well and p-well;    depositing an oxide layer to a thickness of between about 225 nm to 1000 nm;    removing the place-holder gate and gate oxide;    depositing a high-k dielectric in the gate region;    depositing a first metal taken from the group of metals consisting of platinum and iridium in the gate region of the p-well;    depositing a second metal taken from the group of metals consisting of aluminum, zirconium, molybdenum, niobium, thallium, thallium nitride and vanadium in the gate region of each of the n-well and p-well; and    insulating and metallizing the structure.    
     
     
         12 . The method of  claim 11  wherein said depositing a high-k material includes depositing a high-k material taken from the group of materials consisting of HfO 2  and ZrO 2 .  
     
     
         13 . The method of  claim 11  wherein said depositing a high-k material includes depositing high-k material to a thickness of between about 3 nm to 8 nm.  
     
     
         14 . The method of  claim 11  wherein said depositing a first metal includes patterning the gate area of the p-well and depositing a first metal, patterning the first metal and selectively etching the first metal.  
     
     
         15 . The method of  claim 11  wherein said depositing a first metal includes depositing a layer of the first metal over the entire device area, and patterning the device area to leave a first metal cup in the gate region of the p-well.  
     
     
         16 . A dual metal gate CMOS comprising: 
 a substrate having an n-well to form a PMOS transistor and a p-well to form a NMOS transistor, each having a gate region, a source region and a drain region;    in the NMOS, a gate including a high-k cup, a first metal cup formed in the said high-k cup, and a second metal gate formed in said first metal cup;    in the PMOS, a gate including a high-k cup and a second metal gate formed in said high-k cup;    wherein said first metal is taken from the group of metals consisting of platinum and iridium; and    wherein said second metal is taken from the group of metals consisting of aluminum, zirconium, molybdenum, niobium, thallium, thallium nitride and vanadium.    
     
     
         17 . The CMOS of  claim 16  wherein said high-k material is a high-k material taken from the group of materials consisting of HfO 2  and ZrO 2 .