Process for manufacturing a semiconductor device

Abstract

There is disclosed a process for manufacturing a semiconductor device. When a metal film is formed by plasma CVD in a contact hole which penetrates an interlayer insulating film and reaches an electrode of the device, a gas comprising hydrogen and argon in a deposition chamber of a plasma CVD apparatus is introduced. Then a metal halide gas is introduced in the deposition chamber simultaneously with or before plasma generation.

What is claimed is:  
     
         1 . A process for manufacturing a semiconductor device comprising the step of forming a metal film by plasma CVD in a contact hole which penetrates an interlayer insulating film covering a given device formed on a semiconductor substrate and which reaches an electrode of the device, wherein; 
 the metal film is formed in the contact hole by introducing a gas comprising hydrogen and argon in a deposition chamber of a plasma CVD apparatus and then introducing a metal halide gas in the deposition chamber simultaneously with or before plasma generation.    
     
     
         2 . The process for manufacturing a semiconductor device as claimed in  claim 1  where the metal halide gas is introduced before plasma generation.  
     
     
         3 . The process for manufacturing a semiconductor device as claimed in  claim 1  where the metal film is made of a high melting point metal.  
     
     
         4 . The process for manufacturing a semiconductor device as claimed in  claim 1  where the metal halide is selected from the group consisting of metal chlorides and iodides.  
     
     
         5 . The process for manufacturing a semiconductor device as claimed in  claim 1  where the device comprises an MOSFET and the contact hole is for electric connection with the gate electrode of the MOSFET.  
     
     
         6 . The process for manufacturing a semiconductor device as claimed in  claim 5  where the gate insulating film of the MOSFET has a thickness of 100 Å or less.  
     
     
         7 . The process for manufacturing a semiconductor device as claimed in  claim 5  where the antenna ratio of the gate electrode defined by dividing the total area of the gate electrode by the area of the channel region) is equal to 100 or larger.  
     
     
         8 . The process for manufacturing a semiconductor device as claimed in  claim 5  where the aspect ratio of the contact hole is equal to 6 or larger.  
     
     
         9 . A plasma CVD apparatus for the manufacturing process for a semiconductor device as claimed in  claim 1 , comprising a synchronization/delay mechanism whereby the metal halide gas is introduced simultaneously with or before turning RF power on for plasma generation.