Semiconductor device and manufacturing process therefor as well as plating solution

Abstract

An object of this invention is to improve stress-migration resistance and reliability in a semiconductor device comprising a metal region. In an insulating film 101 is formed a lower interconnection consisting of a barrier metal film 102 and a copper-silver alloy film 103, on which is then formed an interlayer insulating film 104. In the interlayer insulating film 104 is formed an upper interconnection consisting of a barrier metal film 106 and a copper-silver alloy film 111. The lower and the upper interconnections are made of a copper-silver alloy which contains silver to an amount more than a solid solution limit of silver to copper.

What is claimed is:  
     
         1 . A semiconductor device comprising a metal region on a semiconductor substrate, wherein a silver content is more than 1 wt % to the total amount of component metals in the metal region.  
     
     
         2 . A semiconductor device comprising a metal region on a semiconductor substrate, wherein the metal region comprises copper and silver; and a silver content to the total amount of component metals in the metal region is more than a solid solution limit of silver to copper.  
     
     
         3 . A semiconductor device comprising a metal region on a semiconductor substrate wherein a maximum hysteresis error in a temperature-stress curve in the metal region is 150 MPa or less.  
     
     
         4 . A semiconductor device comprising a metal region on a semiconductor substrate wherein a recrystallization temperature of a component metal of the metal region is 200° C. or higher.  
     
     
         5 . The semiconductor device as claimed in  claim 3 , wherein the metal region is made of a silver-containing metal.  
     
     
         6 . The semiconductor device as claimed in  claim 4 , wherein the metal region is made of a silver-containing metal.  
     
     
         7 . The semiconductor device as claimed in  claim 1 , wherein the metal region is an interconnection plug or pad.  
     
     
         8 . The semiconductor device as claimed in  claim 2 , wherein the metal region is an interconnection plug or pad.  
     
     
         9 . The semiconductor device as claimed in  claim 3 , herein the metal region is an interconnection plug or pad.  
     
     
         10 . The semiconductor device as claimed in  claim 4 , wherein the metal region is an interconnection plug or pad.  
     
     
         11 . A process for manufacturing a semiconductor device comprising the steps of: 
 forming a metal region on a semiconductor substrate;    contacting the surface of the metal region with a silver-containing liquid; and    heating the metal region.    
     
     
         12 . The process for manufacturing a semiconductor device as claimed in  claim 11 , wherein the metal region contains copper.  
     
     
         13 . The process for manufacturing a semiconductor device as claimed in  claim 11 , wherein a silver content is more than 1 wt % to the total amount of component metals in the metal region after heating.  
     
     
         14 . A process for manufacturing a semiconductor device comprising the steps of: 
 contacting a semiconductor substrate or a film formed thereon with a silver-containing solution to precipitate silver;    forming a metal region on the precipitated silver; and    heating the metal region.    
     
     
         15 . The process for manufacturing a semiconductor device as claimed in  claim 14 , wherein the metal region contains copper.  
     
     
         16 . The process for manufacturing a semiconductor device as claimed in  claim 14 , wherein a silver content is more than 1 wt % to the total amount of component metals in the metal region after heating.  
     
     
         17 . A process for manufacturing a semiconductor device comprising the steps of contacting a device-forming surface of a semiconductor substrate with a silver-containing plating solution; and forming a silver-containing metal region on the semiconductor substrate.  
     
     
         18 . The process for manufacturing a semiconductor device as claimed in  claim 17 , wherein a chloride ion concentration in the plating solution is 100 ppm by weight or less.  
     
     
         19 . The process for manufacturing a semiconductor device as claimed in  claim 17 , wherein the plating solution contains copper at 0.01 to 5 mol/L, silver at 0.01 to 5 mol/L, ethylenediamine at 0.01 to 5 mol/L and water.  
     
     
         20 . The process for manufacturing a semiconductor device as claimed in  claim 17 , wherein the plating solution contains copper at 0.01 to 5 mol/L, silver at 0.01 to 5 mol/L, pyrophosphoric acid or its salt at 0.01 to 5 mol/L and water.  
     
     
         21 . The process for manufacturing a semiconductor device as claimed in any of claims  17 , wherein the metal region contains copper.