Semiconductor device having one of patterned SOI and SON structure

Abstract

A semiconductor device includes first and second semiconductor layers and first and second MOS transistors. The first semiconductor layer is provided on and electrically connected to the semiconductor substrate. The second semiconductor layer is provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity. The first and second MOS transistors are respectively provided on the first and second semiconductor layers, and each has a gate electrode arranged parallel to a boundary between the first and second semiconductor layers.

What is claimed is:  
     
         1 . A semiconductor device comprising: 
 a first semiconductor layer provided on and electrically connected to a semiconductor substrate;    a second semiconductor layer provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity; and    first and second MOS transistors, respectively provided on the first and second semiconductor layers and each having a gate electrode arranged parallel to a boundary between the first and second semiconductor layers.    
     
     
         2 . The semiconductor device according to  claim 1 , wherein the gate electrodes of the first and second MOS transistors are arranged parallel to each other.  
     
     
         3 . The semiconductor device according to  claim 1 , wherein a source region of the first MOS transistor is provided near the boundary between the first and second semiconductor layers.  
     
     
         4 . The semiconductor device according to  claim 1 , wherein a source region of the first MOS transistor has same potential as that of the first semiconductor layer.  
     
     
         5 . The semiconductor device according to  claim 1 , wherein source and drain regions of the second MOS transistor reach a bottom of the second semiconductor layer.  
     
     
         6 . The semiconductor device according to  claim 1 , further comprising an insulating film provided on the semiconductor substrate, wherein the second semiconductor layer is provided above the semiconductor substrate with the insulating film interposed therebetween.  
     
     
         7 . The semiconductor device according to  claim 1 , wherein the second semiconductor layer is provided above the semiconductor substrate with the cavity interposed therebetween.  
     
     
         8 . A semiconductor device comprising: 
 a first semiconductor layer provided on and electrically connected to a semiconductor substrate;    a second semiconductor layer provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity; and    a first element region provided in one of the first and second semiconductor layers and located at a first distance from a boundary between the first and second semiconductor layers;    a second element region provided in said one of the first and second semiconductor layers where the first element region is provided, and located at a second distance longer than the first distance from the boundary between the first and second semiconductor layers;    a first MOS transistor provided in the first element region and having a gate electrode arranged parallel to the boundary between the first and second semiconductor layers; and    a second MOS transistor provided in the second element region and having a gate electrode arranged perpendicular to the gate electrode of the first MOS transistor.    
     
     
         9 . The semiconductor device according to  claim 8 , wherein a junction between channel and source regions of the first MOS transistor is located at at least the second distance from the boundary between the first and second semiconductor layers.  
     
     
         10 . The semiconductor device according to  claim 8 , wherein: 
 the first and second element regions are provided in the first semiconductor layer; and    a source region of the first MOS transistor is provided near the boundary between the first and second semiconductor layers.    
     
     
         11 . The semiconductor device according to  claim 8 , wherein: 
 the first and second element regions are provided in the first semiconductor layer; and    a source region of the first MOS transistor has same potential as that of the first semiconductor layer.    
     
     
         12 . The semiconductor device according to  claim 8 , wherein: 
 the first and second element regions are provided in the second semiconductor layer; and    source and drain regions of the second MOS transistor reach a bottom of the second semiconductor layer.    
     
     
         13 . The semiconductor device according to  claim 8 , further comprising an insulating film provided on the semiconductor substrate, wherein the second semiconductor layer is provided above the semiconductor substrate with the insulating film interposed therebetween.  
     
     
         14 . The semiconductor device according to  claim 8 , wherein the second semiconductor layer is provided above the semiconductor substrate with the cavity interposed therebetween.  
     
     
         15 . A semiconductor device comprising: 
 a first semiconductor layer provided on and electrically connected to a semiconductor substrate;    a second semiconductor layer provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity; and    a third semiconductor layer provided in the first semiconductor layer, part of the third semiconductor layer being extended to reach the semiconductor substrate just under the second semiconductor layer.    
     
     
         16 . The semiconductor device according to  claim 15 , further comprising a MOS transistor having source and drain regions separated from each other in a surface region of the third semiconductor layer and a gate electrode provided on a gate insulating film formed on part of the third semiconductor layer between the source and drain regions, the gate electrode extending in parallel to the boundary between the first and second semiconductor layers and the source region being provided near the boundary.  
     
     
         17 . The semiconductor device according to  claim 15 , wherein the third semiconductor layer has a same conductivity type as that of the semiconductor substrate.  
     
     
         18 . The semiconductor device according to  claim 15 , wherein the third semiconductor layer has same potential as that of the semiconductor substrate.  
     
     
         19 . The semiconductor device according to  claim 15 , further comprising an insulating film formed on the semiconductor substrate, wherein the second semiconductor layer is provided above the semiconductor substrate with the insulating film interposed therebetween.  
     
     
         20 . The semiconductor device according to  claim 15 , wherein the second semiconductor layer is provided above the semiconductor substrate with the cavity interposed therebetween.  
     
     
         21 . A semiconductor device comprising: 
 a first semiconductor layer provided on and electrically connected to a semiconductor substrate;    a second semiconductor layer provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity; and    a group of semiconductor elements provided in one of the first and second semiconductor layers, except for a region near a boundary between the first and second semiconductor layer; and    a group of dummy elements for the semiconductor elements provided on the first and second semiconductor layers near the boundary.    
     
     
         22 . The semiconductor device according to  claim 21 , wherein the semiconductor elements and the dummy elements have different structures.  
     
     
         23 . The semiconductor device according to  claim 21 , wherein the semiconductor elements are memory cells.  
     
     
         24 . The semiconductor device according to  claim 21 , further comprising an insulating film formed on the semiconductor substrate, wherein the second semiconductor layer is provided above the semiconductor substrate with the insulating film interposed therebetween.  
     
     
         25 . The semiconductor device according to  claim 21 , wherein the second semiconductor layer is provided above the semiconductor substrate with the cavity interposed therebetween.