Structure and method to preserve STI during etching

Abstract

Disclosed is a method of protecting a semiconductor shallow trench isolation (STI) oxide from etching, the method comprising lowering, if necessary, the upper surface of said STI oxide to a level below that of adjacent silicon active areas, depositing a nitride liner upon said STI oxide and adjacent silicon active areas in a manner effective in defining a depression above said STI oxide, filling said depression with a protective film, and removing said nitride layer from said adjacent active areas.

What is claimed is:  
     
         1 . A method of protecting a semiconductor shallow trench isolation (STI) oxide from etching, the method comprising: 
 lowering, if necessary, the upper surface of said STI oxide to a level below that of adjacent silicon active areas;    depositing a nitride liner upon said STI oxide and adjacent silicon active areas in a manner effective in defining a depression above said STI oxide;    filling said depression with a protective film; and    removing said nitride layer from said adjacent active areas.    
     
     
         2 . The method of  claim 1  wherein said deposition of a nitride liner is effected with a chemical vapor deposition.  
     
     
         3 . The method of  claim 2  wherein said chemical vapor deposition is one selected from the group: a low pressure chemical vapor deposition; a rapid thermal chemical vapor deposition; a plasma-enhanced chemical vapor deposition; or a high-density plasma chemical vapor deposition.  
     
     
         4 . The method of  claim 2  wherein said chemical vapor deposition further comprises reacting a silane derivative with ammonia.  
     
     
         5 . The method of  claim 1  wherein said protective film is an organic polymer.  
     
     
         6 . The method of  claim 5  wherein said organic polymer is a planarizing polymer.  
     
     
         7 . The method of  claim 6  wherein said planarizing protective polymer is an anti-reflective coating polymer.  
     
     
         8 . The method of  claim 7  wherein said anti-reflective coating polymer is one selected from the group: mixtures of acrylates and methacrylates; mixtures of polyurea and polysulfone polymers; and copolymers of benzophenone and bisphenol-A.  
     
     
         9 . The method of  claim 6  wherein said planarizing protective polymer is a photo-resist polymer.  
     
     
         10 . The method of  claim 9  wherein said photo-resist polymer comprises a novolak resin.  
     
     
         11 . The method of  claim 1  wherein said protective film is a spin-on oxide.  
     
     
         12 . The method of  claim 1 , wherein said protective film is conformal and is planarized by chemical mechanical polishing.  
     
     
         13 . The method of  claim 1  wherein said filling of said depression with protective film comprises: 
 depositing a layer of said protective film over said nitride layer; and  
 recessing said protective film such that said protective film remains only in said depression.  
 
     
     
         14 . The method of clam  13  wherein said protective film is an organic polymer and said recessing is effected with a plasma etch.  
     
     
         15 . The method of  claim 1  further comprising removing said protective film from said depression.  
     
     
         16 . The method of  claim 15  wherein said removing of said protective film is accomplished with a reactive ion etch.  
     
     
         17 . A method of protecting a semiconductor shallow trench isolation (STI) oxide from etching, the method comprising: 
 lowering, if necessary, the upper surface of said STI oxide to a level below that of adjacent silicon active areas;    optionally depositing a silicon oxide layer over said STI oxide and adjacent silicon active areas effective in protecting said adjacent silicon active layers from stresses induced by a conformal nitride liner deposited thereon;    executing a chemical vapor deposition to deposit said conformal nitride liner upon said STI oxide and adjacent silicon active areas in a manner effective in defining a depression above said STI oxide;    covering said nitride liner with a protective film comprising an organic polymer;    recessing said protective film with a plasma etch, such that said protective film remains only in said depression;    removing said nitride layer from said adjacent active areas with a reactive ion etch; and    removing said protective film from said depression with a plasma etch.    
     
     
         18 . A semiconductor structure, comprising a plurality of active areas separated by one or more shallow trench isolations wherein only said shallow trench isolations are covered by a protective layer of silicon nitride.  
     
     
         19 . A semiconductor structure comprising: 
 a plurality of active areas separated by one or more shallow trench isolations;    said active areas and shallow trench isolations covered by a layer of silicon nitride, wherein said layer of silicon nitride comprises depressions over said shallow trench isolations;    a protective film disposed in said depressions.    
     
     
         20 . A method of protecting a semiconductor shallow trench isolation (STI) oxide from etching, the method comprising: 
 providing means for lowering, if necessary, the upper surface of said STI oxide to a level below that of adjacent silicon active areas;    providing means for depositing a nitride liner upon said STI oxide and adjacent silicon active areas in a manner effective in defining a depression above said STI oxide;    providing means for protecting said adjacent silicon active areas from stresses induced by said nitride liner;    providing means for filling said depression with a protective film;    providing means for removing said nitride layer from said adjacent active areas.