Multi-chip module and fabricating method thereof
Abstract
A multi-chip module and a fabricating method thereof are proposed, in which two or more chips are simultaneously integrated in a package unit and then connected to a printed circuit board for providing a manifold level of functionality and data storage capacity. The multi-chip module includes at least a first chip and a second chip, wherein the second chip is connected to the first chip through chip-on-chip technology. Further, the first chip is mounted on a substrate through flip-chip technology. Then, the substrate is attached to a printed circuit board through surface-mount technology (SMT) Finally, at least one passive component is bonded to the printed circuit board at a position beside the substrate and directly beneath the second chip. This arrangement allows the use of a PCB having a smaller layout area for implementing the multi-chip module, making the resulted multi-chip module more compact in profile.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A multi-chip module, comprising:
(a) a first semiconductor chip having an active surface and an inactive surface, wherein the active surface is partitioned at least into a first connecting region and a second connecting region; (b) a second semiconductor chip having an active surface and an inactive surface, and mounted on the second connecting region of the first semiconductor chip through chip-on-chip technology; (c) a substrate having an upper side and a lower side, wherein the upper side is used for mounting the first connecting region of the first semiconductor chip thereon through flip-chip technology, and the substrate has a predetermined height larger than the thickness of the second semiconductor chip; and (d) a printed circuit board for mounting the substrate thereon through surface-mount technology.
2 . The multi-chip module of claim 1 , further comprising:
at least one passive component bonded to the printed circuit board at a predetermined position beside the substrate and beneath the second semiconductor chip.
3 . The multi-chip module of claim 1 , wherein the first and second semiconductor chips are memory chips.
4 . The multi-chip module of claim 1 , wherein the substrate is a silicon-made substrate.
5 . The multi-chip module of claim 1 , wherein the substrate is an organic substrate.
6 . The multi-chip module of claim 1 , wherein the substrate is a ceramic substrate.
7 . A multi-chip module, comprising:
(a) a first semiconductor chip having an active surface and an inactive surface, wherein the active surface is partitioned into a first connecting region, a second connecting region, and a third connecting region; (b) a second semiconductor chip having an active surface and an inactive surface, wherein the active surface is mounted on the second connecting region of the first semiconductor chip through chip-on-chip technology; (c) a third semiconductor chip having an active surface and an inactive surface, wherein the active surface is mounted on the third connecting region of the first semiconductor chip through chip-on-chip technology; (d) a substrate having an upper side and a lower side, wherein the upper side is used for mounting the first connecting region of the first semiconductor chip thereon through flip-chip technology, and the substrate has a predetermined height larger than the overall thickness of the second semiconductor chip or the third semiconductor chip; and (e) a printed circuit board for mounting the substrate thereon through surface-mount technology
8 . The multi-chip module of claim 7 , further comprising:
at least one passive component bonded to the printed circuit board at a predetermined position beside the substrate and beneath the second semiconductor chip or the third semiconductor chip.
9 . The multi-chip module of claim 7 , wherein the first, second, and third semiconductor chips are memory chips.
10 . The multi-chip module of claim 7 , wherein the substrate is a silicon-made substrate
11 . The multi-chip module of claim 7 , wherein the substrate is an organic substrate.
12 . The multi-chip module of claim 7 , wherein the substrate is a ceramic substrate.
13 . A fabricating method of a multi-chip module, comprising the steps of:
(1) preparing a first semiconductor chip, a second semiconductor chip, and a third semiconductor chip; wherein the first semiconductor chip has an active surface and an inactive surface, with the active surface being partitioned into a first connecting region, a second connecting region, and a third connecting region; the second semiconductor chip has an active surface and an inactive surface; and the third semiconductor chip has an active surface and an inactive surface; (2) mounting the active surface of the second semiconductor chip and the active surface of the third semiconductor chip respectively on the second connecting region and the third connecting region of the first semiconductor chip through chip-on-chip technology; (3) mounting the first connecting region of the first semiconductor chip on a substrate through flip-chip technology; and (4) mounting the substrate on a printed circuit board through surface-mount technology.
14 . The fabricating method of claim 13 , further comprising the step of:
bonding at least one passive component to the printed circuit board at a predetermined position beside the substrate and beneath the second semiconductor chip or the third semiconductor chip.
15 . The fabricating method of claim 13 , wherein in the step ( 1 ), the first, second, and third semiconductor chips are memory chips.
16 . The fabricating method of claim 13 , wherein in the step ( 1 ), the substrate is a silicon-made substrate.
17 . The fabricating method of claim 13 , wherein in the step ( 1 ), the substrate is an organic substrate.
18 . The fabricating method of claim 13 , wherein in the step ( 1 ), the substrate is a ceramic substrate.Join the waitlist — get patent alerts
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