Amplifier circuit and liquid-crystal display unit using the same

Abstract

An amplifier circuit comprising an input stage and an output stage which are cascade-connected between a signal input terminal to which an input signal is input and a signal output terminal to which a capacitive load is connected and which includes at least an input amplification stage and an output amplification stage, and a resistor circuit including at least a resistor inserted between the output terminal of the output amplification stage and the signal output terminal.

1 . An amplifier circuit comprising: 
 amplification stages cascade-connected between a signal input terminal to which an input signal is supplied and a signal output terminal to which a capacitive load is connected and including at least an input amplification stage and an output amplification stage; and    a resistor circuit including at least a resistor inserted between the output terminal of said output amplification stage and said signal output terminal.    
     
     
         2 . An amplifier circuit according to  claim 1 , wherein said resistor circuit includes resistors and a switch for connecting at least one of said resistors between said output amplification stage and said signal output terminal.  
     
     
         3 . An amplifier circuit according to  claim 1 , further comprising a feedback loop for applying feedback from the output terminal of said output amplification stage to the input terminal of said input amplification stage.  
     
     
         4 . An amplifier circuit according to  claim 1 , wherein the frequency of a second pole appearing in an open loop frequency characteristic of said amplifier circuit is lower than the frequency at which the gain of said amplifier circuit is one and the frequency of a first zero appearing in the open loop frequency characteristic is set lower than the frequency at which the gain of said amplifier circuit is one.  
     
     
         5 . An amplifier circuit according to  claim 1 , further including a capacitance between the input and output terminals of said output amplification stage.  
     
     
         6 . An amplifier circuit according to  claim 1 , wherein said signal input terminal receives an input signal voltage changing at specific intervals of time and the time constant determined by said resistor circuit and the capacitive component of said capacitive load is set at more than zero and not more than ⅕ of said specific interval.  
     
     
         7 . An amplifier circuit according to  claim 6 , wherein the resistance of said resistor circuit is more than zero and not more than 50 kΩ.  
     
     
         8 . An amplifier circuit according to  claim 1 , wherein said resistor circuit is comprised of resistors and switches and has its resistance set by the turning on and off of the switches.  
     
     
         9 . An amplifier circuit according to  claim 1 , wherein said resistor circuit is comprised of field-effect transistors with specific on-resistances.  
     
     
         10 . An amplifier circuit according to  claim 1 , further comprising means for sensing that the input signal voltage inputted to said signal input terminal has changed to a specific polarity and controlling a bias current to said output amplification stage.  
     
     
         11 . An amplifier circuit according to  claim 1 , wherein: 
 said input amplification stage includes a positive-side amplifier circuit and a negative-side amplifier circuit to which a first and a second input signal changing to the positive side and negative side with respect to a specific common voltage are inputted,    said positive-side amplifier circuit being comprised of a first differential transistor pair to which said first input signal is inputted, a first current source for supplying a tail current to the first differential transistor pair, a first current mirror circuit whose current input terminal and current output terminal are connected to the two output terminals of said first differential transistor pair, and a first switch provided between the two output terminals of said first differential transistor pair,    said negative-side amplifier circuit being comprised of a second differential transistor pair to which said second input signal is inputted, a second current source for supplying a tail current to the second differential transistor pair, a second current mirror circuit whose current input terminal and current output terminal are connected to the two output terminals of said second differential transistor pair, and a second switch provided between the two output terminals of said second differential transistor pair, and    said first switch being brought into the off state and said second switch being brought into the on state when said first input signal is inputted to said positive-side amplifier circuit, and said first switch being brought into the on state and said second switch being brought into the off state when said second input signal is inputted to said negative-side amplifier circuit; and    said output amplification stage includes a complementary transistor pair whose drains or collectors are connected to the output terminal of the output amplification stage, the gate or base of one of the complementary transistor pair being connected to one output terminal of said positive-side amplifier circuit and the gate or base of the other of the complementary transistor pair being connected to one output terminal of said negative-side amplifier circuit.    
     
     
         12 . An amplifier circuit according to  claim 1 , wherein 
 said input amplification stage includes a positive-side amplifier circuit and a negative-side amplifier circuit to which a first and a second input signal changing to the positive side and negative side with respect to a specific common voltage are inputted,    said positive-side amplifier circuit being comprised of a first differential transistor pair to which said first input signal is inputted, a first current source for supplying a tail current to the first differential transistor pair, a first current mirror circuit whose current input terminal and first current output terminal are connected to the two output terminals of said first differential transistor pair, a first switch provided between the two output terminals of said first differential transistor pair, and a third switch for turning on and off said first current source,    said negative-side amplifier circuit being comprised of a second differential transistor pair to which said second input signal is inputted, a second current source for supplying a tail current to the second differential transistor pair, a second current mirror circuit whose current input terminal and first current output terminal are connected to the two output terminals of said second differential transistor pair, a second switch provided between the two output terminals of said second differential transistor pair, and a fourth switch for turning on and off said second current source,    a second current output terminal of said first current mirror circuit being connected via a fifth switch to the current input terminal of said second current mirror circuit and a second current output terminal of said second current mirror circuit being connected via a sixth switch to the current input terminal of said first current mirror circuit, and    said first, fourth, and sixth switches being brought into the off state and said second, third, and fifth switches being brought into the on state when said first input signal is inputted to said positive-side amplifier circuit, and said first, fourth, and sixth switches being brought into the on state and said second, third, and fifth switches being brought into the off state when said second input signal is inputted to said negative-side amplifier circuit; and    said output amplification stage includes a complementary transistor pair whose drains or collectors are connected to the output terminal of the output amplification stage, the gate or base of one of the complementary transistor pair being connected to one output terminal of said positive-side amplifier circuit and the gate or base of the other output terminal of the complementary transistor pair being connected to one output terminal of said negative-side amplifier circuit.    
     
     
         13 . An amplifier circuit according to  claim 1 , wherein said input amplification stage includes an input circuit comprised of a first conductivity type transistor connected to the signal input terminal and a second input circuit comprised of a second conductivity type transistor, and which further includes a feedforward circuit including at least a capacitive element which is provided from one of a source and a drain of one of the first and the second conductivity type transistor to said output amplifier stage.  
     
     
         14 . An amplifier circuit according to  claim 13 , wherein said output amplification stage is comprised of a first and a second transistor which have gates for receiving signals, the drain of said first transistor being connected to said signal output terminal, the source of said first transistor being connected to the drain of said second transistor, the source of said second transistor being connected to a first power supply, and the connection node of the source of said first transistor and the drain of said second transistor being connected to the output of said feedforward circuit.  
     
     
         15 . An amplifier circuit according to  claim 13 , wherein said power supply for supplying a bias current to said output amplification stage is comprised of a resistive element and a third transistor with a gate to which the bias voltage is applied via the resistive element, the connection node of said resistive element and the gate of said third transistor being connected to said feedforward circuit.  
     
     
         16 . An amplifier circuit according to  claim 15 , further comprising means for sensing that the input signal voltage inputted to said signal input terminal has changed to a specific polarity and controlling the bias current to said output amplification stage.  
     
     
         17 . An amplifier circuit according to  claim 15 , wherein said resistive element is comprised of a field-effect transistor with a specific on-resistance.  
     
     
         18 . A liquid-crystal display unit comprising: 
 a liquid-crystal display including pixels, signal lines for selectively applying a signal voltage according to an image signal to each of said pixels, and scanning lines intersecting the signal lines;    a driving circuit for driving said signal lines according to an image signal; and    a selector circuit for selecting said scanning lines in sequence, wherein 
 said driving circuit includes an amplifier circuit comprising amplification stages that are cascade-connected between a signal input terminal to which an input signal is supplied and a signal output terminal to which a capacitive load is connected and that includes at least an input amplification stage and an output amplification stage, and a resistor circuit including at least a resistor inserted between the output terminal of said output amplification stage and said signal output terminal.  
   
     
     
         19 . A liquid-crystal display unit according to  claim 18 , wherein said resistor circuit includes resistors and a switch for connecting at least one of said resistors between said output amplification stage and said signal output terminal.  
     
     
         20 . A liquid-crystal display unit according to  claim 18 , further comprising a feedback loop for applying feedback from the output terminal of said output amplification stage to the input terminal of said input amplification stage.  
     
     
         21 . A liquid-crystal display unit according to  claim 18 , wherein the frequency of a second pole appearing in an open loop frequency characteristic of said amplifier circuit is lower than the frequency at which the gain of said amplifier circuit is one and the frequency of a first zero point appearing in the open loop frequency characteristic is set lower than the frequency at which the gain of said amplifier circuit is one.  
     
     
         22 . A liquid-crystal display unit according to  claim 18 , further including a capacitance between the input and output terminals of said output amplification stage.  
     
     
         23 . A liquid-crystal display unit according to  claim 18 , wherein said signal input terminal receives an input signal voltage changing at specific intervals of time and the time constant determined by said resistor circuit and the capacitive component of said capacitive load is set at more than zero and not more than ⅕ of said specific interval.  
     
     
         24 . A liquid-crystal display unit according to  claim 23 , wherein the resistance of said resistor circuit is more than zero and not more than 50 kΩ.  
     
     
         25 . A liquid-crystal display unit according to  claim 18 , wherein said resistor circuit is comprised of resistors and switches and has its resistance set by the turning on and off of the switches.  
     
     
         26 . A liquid-crystal display unit according to  claim 18 , wherein said resistor circuit is comprised of field-effect transistors with specific on-resistances.  
     
     
         27 . A liquid-crystal display unit according to  claim 18 , further comprising means for sensing that the input signal voltage inputted to said signal input terminal has changed to a specific polarity and controlling a bias current to said output amplification stage.  
     
     
         28 . A liquid-crystal display unit according to  claim 18 , wherein: 
 said input amplification stage includes a positive-side amplifier circuit and a negative-side amplifier circuit to which a first and a second input signal changing to the positive-side and negative-side with respect to a specific common voltage are inputted,    said positive-side amplifier circuit being comprised of a first differential transistor pair to which said first input signal is inputted, a first current source for supplying a tail current to the first differential transistor pair, a first current mirror circuit whose current input terminal and current output terminal are connected to the two output terminals of said first differential transistor pair, and a first switch provided between the two output terminals of said first differential transistor pair,    said negative-side amplifier circuit being comprised of a second differential transistor pair to which said second input signal is inputted, a second current source for supplying a tail current to the second differential transistor pair, a second current mirror circuit whose current input terminal and current output terminal are connected to the two output terminals of said second differential transistor pair, and a second switch provided between the two output terminals of said second differential transistor pair, and    said first switch being brought into the off state and said second switch being brought into the on state when said first input signal is inputted to said positive-side amplifier circuit, and said first switch being brought into the on state and said second switch being brought into the off state when said second input signal is inputted to said negative-side amplifier circuit; and    said output amplification stage includes a complementary transistor pair whose drains or collectors are connected to the output terminal of the output amplification stage, the gate or base of one of the complementary transistor pair being connected to one output terminal of said positive-side amplifier circuit and the gate or base of the other of the complementary transistor pair being connected to one output terminal of said negative-side amplifier circuit.    
     
     
         29 . A liquid-crystal display unit according to  claim 18 , wherein 
 said input amplification stage includes a positive-side amplifier circuit and a negative-side amplifier circuit to which a first and a second input signal changing to the positive-side and negative-side with respect to a specific common voltage are inputted,    said positive-side amplifier circuit being comprised of a first differential transistor pair to which said first input signal is inputted, a first current source for supplying a tail current to the first differential transistor pair, a first current mirror circuit whose current input terminal and first current output terminal are connected to the two output terminals of said first differential transistor pair, a first switch provided between the two output terminals of said first differential transistor pair, and a third switch for turning on and off said first current source,    said negative-side amplifier circuit being comprised of a second differential transistor pair to which said second input signal is inputted, a second current source for supplying a tail current to the second differential transistor pair, a second current mirror circuit whose current input terminal and first current output terminal are connected to the two output terminals of said second differential transistor pair, a second switch provided between the two output terminals of said second differential transistor pair, and a fourth switch for turning on and off said second current source,    a second current output terminal of said first current mirror circuit being connected via a fifth switch to the current input terminal of said second current mirror circuit and a second current output terminal of said second current mirror circuit being connected via a sixth switch to the current input terminal of said first current mirror circuit, and    said first, fourth, and sixth switches being brought into the off state and said second, third, and fifth switches being brought into the on state when said first input signal is inputted to said positive-side amplifier circuit, and said first, fourth, and sixth switches being brought into the on state and said second, third, and fifth switches being brought into the off state when said second input signal is inputted to said negative-side amplifier circuit; and    said output amplification stage includes a complementary transistor pair whose drains or collectors are connected to the output terminal of the output amplification stage, the gate or base of one of the complementary transistor pair being connected to one output terminal of said positive-side amplifier circuit and the gate or base of the other output terminal of the complementary transistor pair being connected to one output terminal of said negative-side amplifier circuit.    
     
     
         30 . A liquid-crystal display unit according to  claim 18 , wherein said input amplification stage includes an input circuit comprised of a first conductivity type transistor connected to the signal input terminal and a second input circuit comprised of a second conductivity type transistor, and which further includes a feedforward circuit including at least a capacitive element which is provided from one of a source and a drain of one of the first and the second conductivity type transistor to said output amplifier stage.  
     
     
         31 . A liquid-crystal display unit according to  claim 30 , wherein said output amplification stage is comprised of a first and a second transistor which have gates for receiving signals, the drain of said first transistor being connected to said signal output terminal, the source of said first transistor being connected to the drain of said second transistor, the source of said second transistor being connected to a first power supply, and the connection node of the source of said first transistor and the drain of said second transistor being connected to the output of said feedforward circuit.  
     
     
         32 . A liquid-crystal display unit according to  claim 30 , wherein said power supply for supplying a bias current to said output amplification stage is comprised of a resistive element and a third transistor with a gate to which the bias voltage is applied via the resistive element, the connection node of said resistive element and the gate of said third transistor being connected to the output of said feedforward circuit.  
     
     
         33 . A liquid-crystal display unit according to  claim 32 , further comprising means for sensing that the input signal voltage inputted to said signal input terminal has changed to a specific polarity and controlling the bias current to said output amplification stage.  
     
     
         34 . A liquid-crystal display unit according to  claim 32 , wherein said resistive element is comprised of a field-effect transistor with a specific on-resistance.