Electrically isolated power device package
Abstract
A packaged power device includes a substrate including a first conductive layer, a second dielectric layer, and a third conductive layer. The first conductive layer is bonded to the second dielectric layer, and the second dielectric layer is bonded to the third conductive layer. The first and third conductive layers are electrically isolated from each other. The substrate has a lower surface. A semiconductor die is bonded to the first conductive layer of the substrate. A plastic package encloses the die and has a lower surface. A curved backside includes the lower surfaces of the plastic package and substrate.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A packaged power device, comprising:
a substrate including a first conductive layer, a second dielectric layer, and a third conductive layer, the first conductive layer being bonded to the second dielectric layer, and the second dielectric layer being bonded to the third conductive layer, the first and third conductive layers being electrically isolated from each other, the substrate having a lower surface; a semiconductor die being bonded to the first conductive layer of the substrate; a plastic package enclosing the die and having a lower surface; and a curved backside including the lower surfaces of the plastic package and substrate.
2 . The device of claim 1 , wherein the curved backside of the device is attached to a heatsink to dissipate power generated by the power device, the curved backside of the device being configured to expand toward the heatsink during the operation of the power device, so that heatsink is in contact substantially with the entire backside of the power device.
3 . The power device of claim 1 , wherein the backside of the power device includes a center portion directly underlying the die, a first outer portion extending outward from the center portion in a first direction and a second outer portion extending outward from the center portion in a second direction, wherein the center portion of the backside is substantially flat.
4 . The power device of claim 3 , wherein the center portion of the curved backside of the device overlies flatly against a heatsink to dissipate power generated by the power device, and the first and second outer portions of the backside are provided above the heatsink without contacting the heatsink.
5 . The power device of claim 4 , wherein the power device is clipped or screwed to the heat sink.
6 . The power device of claim 4 , wherein the power device is solder bonded to the heat sink.
7 . The power device of claim 6 , wherein the center portion of the backside is solder bonded to the heatsink and the first and second outer portions are not solder bonded to the heatsink.
8 . The power device of claim 1 , wherein the substrate is a direct bonded metal substrate.
9 . The power device of claim 1 , wherein the substrate is a direct copper bonded substrate, wherein the first and third conductive layers are copper layers.
10 . The power device of claim 1 , wherein the substrate is a direct aluminum bonded substrate, wherein the first and third conductive layers are aluminum layers.
11 . The power device of claim 10 , wherein the second dielectric layer is Al 2 O 3 .
12 . The power device of claim 1 , wherein the package has a length N 1 and the backside has a pitch N 2 , wherein the pitch N 2 is no more than 0.002×N 1 .
13 . The power device of claim 1 , wherein the pitch is a vertical distance from a center of the backside to an edge of the backside.
14 . The power device of claim 1 , wherein the backside has a pitch that is no more than 0.001 inch.
15 . A power device, comprising:
a direct bonded metal substrate having a first conductive layer, a second dielectric layer, and a third conductive layer; a semiconductor die bonded to the first conductive layer of the substrate; and a plastic package having a lower surface and substantially enclosing the die and exposing a lower surface of the second conductive layer, wherein a backside of the device has a curved surface.
16 . The power device of claim 15 , wherein the backside of the device has a pitch of no more than about 0.002 inch.
17 . The power device of claim 15 , wherein the device conforms to a TO-247 package standard.
18 . The power device of claim 17 , wherein the backside of the device has a pitch of no more than about 0.001 inch.
19 . The power device of claim 15 , wherein the direct bonded metal substrate is a direct aluminum bonded substrate.
20 . The power device of claim 15 , wherein power device satisfies SOT 227 package standard.
21 . The power device of claim 15 , wherein the third conductive layer has a pattern to provide the substrate with a curved surface.
22 . The power device of claim 15 , wherein the first and third conductive layer has different thickness to provide the substrate with a curved surface.
23 . A method of manufacturing a packaged power device, comprising:
providing a substrate having a curved surface; bonding a semiconductor die on the curved substrate; and forming a plastic package to enclose the die.
24 . The method of claim 23 , wherein the forming step includes:
placing the substrate and the die into a mold; providing molten plastic polymer at a high temperature; and cooling the plastic polymer to obtain a hard plastic package, wherein the plastic shrinks at a different rate than the substrate to offset the curvature of the substrate to provide a power device having a substantially flat backside.
25 . The method of claim 23 , wherein the forming step includes:
placing the substrate and the die into a mold; providing molten plastic polymer at a high temperature; and cooling the plastic polymer to obtain a hard plastic package, wherein the plastic shrinks at a different rate than the substrate to offset partly the curvature of the substrate to provide a power device having a slightly curved backside.
26 . The method of claim 23 , wherein the substrate is a direct bonded metal substrate.
27 . The method of claim 26 , wherein the substrate is a direct bonded aluminum substrate.
28 . The method of claim 27 , wherein the substrate is a direct bonded copper substrate.
29 . The method of claim 26 , wherein the direct bonded substrate includes a first conductive and a second conductive layer separated by a dielectric layer, wherein the second conductive layer is patterned to provide the direct bonded substrate with the curved surface.
30 . The method of claim 26 , wherein the direct bonded substrate includes a first conductive and a second conductive layer separated by a dielectric layer, wherein the first and second conductive layers have different thickness to provide the direct bonded substrate with the curved surface.Join the waitlist — get patent alerts
Track US2003186483A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.