Inductive storage capacitor
Abstract
A device includes an element (e.g. in the shape of a sleeve) and a core located in an interior volume defined by the element and at least partially surrounded by the element. The element has two portions: one portion overlaps at least a region of the core thereby to form a capacitor, while another portion surrounds the core thereby to form an inductor. The device may further include an additional capacitor formed by another element that is separated from the core but overlaps at least a region of the core when viewed in a direction perpendicular to the core. The two elements substantially surround the core. The core may be used to hold charge in a non-volatile manner, even when no power is supplied to the device. The device can be manufactured in the normal manner, by forming a via hole, depositing a conductive layer in the via hole to form a sleeve-shaped element, forming a dielectric layer over the conductive layer so that the dielectric layer defines an interior volume, and filling the interior volume with a plug of conductive material that forms the core. An additional dielectric layer and an additional conductive layer may be formed to implement the additional capacitor.
Claims
exact text as granted — not AI-modified1 . A device comprising:
a first element; a second element at least partially surrounding the first element and physically separated from the first element; and a material having a plurality of dangling bonds, said material being located between said first element and said second element.
2 . The device of claim 1 further comprising:
a semiconductor substrate;
wherein each of the first element, the second element and the material are supported by the semiconductor substrate, and the material includes a semiconductor material.
3 . The device of claim 1 wherein the second element surrounds a majority of a surface of the first element.
4 . The device of claim 1 wherein the first element includes an electrical conductive material.
5 . The device of claim 1 wherein the second element includes an electrical conductive material.
6 . The device of claim 1 wherein the first element is at least approximately cylindrical in shape.
7 . The device of claim 1 further comprising:
a third element physically separated from each of the first element and the second element, the third element being located transverse to each of a first axis of the first element and a second axis of the second element.
8 . The device of claim 7 wherein the first element and the third element form a capacitor.
9 . The device of claim 7 wherein the first element has a first end facing the third element, the first end being at least approximately flat.
10 . The device of claim 9 wherein the third element has a surface at least approximately parallel to the first end.
11 . The device of claim 7 wherein each of the second element and the third element include a common electrical conductive material.
12 . The device of claim 7 wherein the second element includes one electrical conductive material and the third element includes another electrical conductive material.
13 . The device of claim 7 wherein an electrical charge can be sensed in the third element.
14 . The device of claim 1 wherein the first element includes a trap material surrounded by an electrically conductive material.
15 . The device of claim 1 wherein the first element and the second element form a capacitor.
16 . The device of claim 1 wherein the first element and the second element form a first capacitor and the first element and the third element form a sense capacitor, wherein the first capacitor and the sense capacitor are coupled in series.
17 . The device of claim 1 wherein the first element and the second element form an inductor, with the first element acting as a core and the second element acting as a coil.
18 . The device of claim 1 wherein the first element generates an electrical charge in response to applying power to the second element.
19 . The device of claim 1 wherein:
the first element is cylindrical in shape with at least one flat end;
the first element and the second element are conductive;
a material between the first element and the second element is at least substantially dielectric;
the third element is at least substantially parallel to the flat end of the first element; and
another material between the first element and the third element is at least substantially dielectric.
20 . A device comprising:
an annular element located in a via hole of a semiconductor material; a plug located in the via hole and surrounded at least partially by but isolated from the annular element; and another element facing one end of the plug.
21 . The device of claim 20 wherein the plug is at least approximately cylindrical in shape.
22 . The device of claim 21 wherein an axis of the annular element is at least approximately coaxial with an axis of the plug.
23 . The device of claim 20 wherein said another element is connected to the annular element and is isolated from the plug, and the device further includes yet another element facing another end of the plug.
24 . The device of claim 23 wherein the only connection of said another element to a voltage source is through the annular element.
25 . The device of claim 20 wherein:
said another element is at least approximately planar and is hereinafter referred to as “end element”; and
said end element is isolated from each of the plug and the annular element.
26 . The device of claim 25 further including yet another element located transverse to and connected to the annular element, wherein said elements at least partially enclose the plug.
27 . A device comprising:
an element located in a via hole of a semiconductor material; and a core located in the via hole and separated from but at least partially surrounded by the element.
28 . The device of claim 27 wherein when viewed in a direction perpendicular to the core:
a portion of the element overlaps at least a region of the core, and
another portion of the element surrounds the core.
29 . The device of claim 27 wherein the element is hereinafter “first element” and the device further comprises:
a second element separated from the core and overlapping at least a region of the core when viewed in a direction perpendicular to the core.
30 . The device of claim 29 wherein the first element is connected to a first conductor for carrying a first voltage, the second element is connected to a second conductor for carrying a second voltage, and the core is not connected to any conductor.
31 . A multilayered structure comprising:
a cup-shaped element defining an interior volume; and a core located in the interior volume and separated from but surrounded by a first wall of the cup-shaped element, one end of the core facing a second wall of the cup-shaped element; wherein said second wall is transverse to and connected to said first wall.
32 . The device of claim 31 further comprising:
an electrode separated from each of the core and the cup-shaped element, the electrode facing another end of the core.
33 . The device of claim 32 wherein:
the electrode and the cup-shaped element substantially enclose the core.
34 . The device of claim 32 further comprising:
a dielectric element formed of a semiconductor material and located between the core and the electrode.
35 . The device of claim 31 further comprising:
a dielectric element formed of a semiconductor material and located between the cup-shaped element and the core.
36 . A circuit comprising:
a capacitor; an inductor coupled in parallel to said capacitor; and a dielectric material located inside said capacitor, said dielectric material having a plurality of traps.
37 . The circuit of claim 36 wherein:
the inductor is in contact with the dielectric material.
38 . The circuit of claim 36 wherein:
the inductor is adjacent to the dielectric material.
39 . The circuit of claim 36 wherein:
during operation of said circuit said inductor generates a field passing through said dielectric material.
40 . The circuit of claim 36 further comprising:
a sensor coupled to said capacitor.
41 . The circuit of claim 40 wherein:
said capacitor and said inductor are coupled to a common terminal;
said sensor is coupled to said common terminal; and
a voltage source is coupled to said common terminal.
42 . The circuit of claim 36 wherein said capacitor is hereinafter “first capacitor,” and the circuit further comprises:
a second capacitor in series with said first capacitor.
43 . The circuit of claim 42 wherein:
said dielectric material is not present inside said second capacitor.
44 . The circuit of claim 42 further comprising:
a sensor coupled to said second capacitor.
45 . The circuit of claim 44 wherein:
a voltage source is coupled to a terminal of said first capacitor; and
said sensor is coupled to a terminal of said second capacitor.
46 . A method comprising:
forming a via hole in a semiconductor material; forming a first layer of conductive material inside the via hole; forming a second layer of insulative material over the first layer, the second layer defining an interior volume; forming a third layer of trap material in said interior volume; forming a fourth layer of insulative material outside said via hole; and forming a fifth layer of conductive material over the fourth layer.
47 . The method of claim 46 wherein:
the third layer fills the interior volume;
the third layer contacts the second layer; and
the third layer contacts the fourth layer.
48 . A method comprising:
forming a first layer of conductive material in the shape of a column, over a semiconductor material; forming a second layer of insulative material over the first layer; forming a fourth layer of insulative material over the second layer while simultaneously forming a third layer of trap material at an interface between the second layer and the fourth layer; and forming a fifth layer of conductive material over the fourth layer.
49 . A computer comprising:
a monitor displaying a symbol, the symbol including:
two parallel line segments; and
a spiral wrapped around the two parallel line segments; and
a memory encoded with software that simulates a capacitor and inductor combination represented by the symbol.
50 . A method of forming a circuit diagram, the method comprising:
drawing two parallel line segments and a spiral wrapped around the two parallel line segments to form a symbol; fc drawing a symbol of a circuit element selected from a group consisting of a transistor and a resistor; and drawing a line connecting the circuit element and the symbol.
51 . The method of claim 50 further comprising:
drawing a rectangle between the two parallel line segments.Join the waitlist — get patent alerts
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