Grooved heat spreader for stress reduction in IC package

Abstract

A new design is provided for the heat spreader of a semiconductor package. Grooves are provided in a surface of the heat spreader, subdividing the heat spreader for purposes of stress distribution into four or more sections. This division of the heat spreader results in a reduction of the mechanical and thermal stress that is introduced by the heat spreader into the device package. Mechanical and heat stress, using conventional heat spreader designs, has a negative, stress induced, effect on the semiconductor die, on the contact points (bump joints) of the semiconductor die and on the solder ball connections of the package.

What is claimed is:  
     
         1 . A method of creating a heat spreader for use in a semiconductor package, comprising the steps of: 
 providing a heat spreader for a semiconductor package; and    providing at least one groove across said heat spreader.    
     
     
         2 . The method of  claim 1 , said heat spreader being a rectangular cube having two large parallel first and a second surfaces of equal surface area bounded by four interconnecting surfaces, a surface area of said interconnecting surfaces being smaller than the surface area of said first and a second large surfaces by a measurable amount, the first surface of said heat spreader having been designated as being the side that faces a semiconductor die after mounting said die in a package of which said heat spreader is an integral part, said first surface facing said die.  
     
     
         3 . The method of  claim 1  wherein said at least one groove comprises two grooves provided at distances from side boundaries of said first surface, said two grooves intersecting.  
     
     
         4 . The method of  claim 1  wherein said at least one groove comprises four grooves, a first and a second of said four grooves intersecting a third and a fourth of said four grooves, said first and said second of said four grooves being provided at a distance from side boundaries of said first surface in accordance with a first equation, said third and said fourth of said four grooves being provided at a distance side boundaries of said first surface in accordance with a second equation.  
     
     
         5 . The method of  claim 1  wherein said at least one groove comprises a multiplicity of grooves, a first half of said multiplicity of grooves intersecting a second half of said multiplicity of grooves, said first half of said multiplicity of grooves being provided at distances from side boundaries of said first surface in accordance with a first equation, said second half of said multiplicity of grooves being provided at a distance from side boundaries of said first surface in accordance with a second equation.  
     
     
         6 . The method of  claim 1  wherein said providing at least one groove across said first surface of said heat spreader comprises using methods of etching or machining or punching of the first surface of the heat spreader.  
     
     
         7 . A heat spreader for a semiconductor package, comprising: 
 a heat spreader; and    at least one groove formed on the surface of said heat spreader.    
     
     
         8 . The heat spreader of  claim 7 , wherein said heat spreader is a rectangular cube having two large parallel first and second surfaces, said first surface of said heat spreader facing a semiconductor die, said at least one groove being formed across said first surface.  
     
     
         9 . The heat spreader of  claim 8 , wherein said at least one groove divides the surface area of said first surface.  
     
     
         10 . The heat spreader of  claim 8 , said at least one groove comprising two grooves, said two grooves intersecting under an angle of 90 degrees.  
     
     
         11 . A method of creating a semiconductor package, comprising the steps of: 
 providing a semiconductor device mounting support, said semiconductor device mounting support having a first and a second surface, first points of electrical contact having been provided in said first surface of said semiconductor device mounting support, second points of electrical contact having been provided in said second surface of said semiconductor device mounting support, one or more layers of interconnect lines having been provided in said semiconductor device mounting support or on the first or second surface of said semiconductor device mounting support;    providing a semiconductor devices, said semiconductor device having been provided with points of electrical contact in a first surface of said semiconductor device;    positioning said semiconductor device above the second surface of said semiconductor device mounting support, said first surface of said semiconductor device facing said second surface of said semiconductor device mounting support, aligning and establishing contact between said points of electrical contact provided in said first surface of said semiconductor device and said points of electrical contact provided in said second surface of said semiconductor device mounting support;    establishing electrical continuity between said points of electrical contact provided in said first surface of said semiconductor device and said points of electrical contact provided in said second surface of said semiconductor device mounting support by a reflow of said points of electrical contact provided in the first surface of said semiconductor device;    providing an underfill for said semiconductor device, leaving a second surface of said semiconductor device exposed;    applying a first adhesive layer over the second surface area of the said semiconductor device mounting support that is not being covered by said underfill;    providing a semiconductor device stiffener having a first and a second surface, said stiffener having been provided with an opening penetrating from said first to said second surface of said stiffener and of adequate size for insertion of said semiconductor device;    positioning said stiffener over the first adhesive layer applied over the second surface of said semiconductor device mounting support, said first surface of said stiffener facing said first adhesive layer, said opening provided in said stiffener being aligned with said semiconductor device mounted on the second surface of said semiconductor device mounting support, said stiffener making contact with said first adhesive layer;    applying a second adhesive layer over the second surface of said semiconductor device and the second surface of said stiffener;    providing a heat spreader having a first and a second surface, said first surface of said heat spreader having been provided with a pattern of grooves, said pattern of grooves comprising at least one groove dividing the surface area of said first surface in sections;    positioning the first surface of said heat spreader over the surface of said second adhesive layer;    providing said first surface of said semiconductor device mounting support with a solder mask, openings in said solder mask exposing said contact points provided in said first surface of said semiconductor device mounting support;    inserting solder balls into said openings provided in said solder mask; and    establishing electrical continuity between said solder balls inserted in said openings in said solder mask and said contact points provided in said first surface of said semiconductor device mounting support by a process of reflow.    
     
     
         12 . The method of  claim 11  wherein said semiconductor device mounting support is selected from the group consisting of a Printed Circuit Board and a metallized structure and a glass substrate.  
     
     
         13 . The method of  claim 11  wherein said pattern of grooves comprises two grooves provided at distances from side boundaries of said first surface.  
     
     
         14 . The method of  claim 11  wherein said pattern of grooves comprises four grooves, a first and a second of said four grooves intersecting a third and a fourth of said four grooves, said first and said second of said four grooves being provided at a distance from side boundaries of said first surface in accordance with a first equation, said third and said fourth of said four grooves being provided at a distance from side boundaries of said first surface in accordance with a second equation.  
     
     
         15 . The method of  claim 11  wherein said pattern of grooves comprises a multiplicity of grooves, a first half of said multiplicity of grooves intersecting a second half of said multiplicity of grooves, said first half of said multiplicity of grooves being provided at distances from side boundaries of said first surface in accordance with a first equation, said second half of said multiplicity of grooves being provided at a distance from side boundaries of said first surface in accordance with a second equation.  
     
     
         16 . The method of  claim 11  wherein said pattern of grooves is provided across said first surface of said heat spreader comprises using methods of etching or machining or punching of the first surface of the heat spreader.  
     
     
         17 . A semiconductor package, comprising: 
 a semiconductor device mounting support;    a semiconductor device, said semiconductor device being mounted on a surface of said semiconductor device mounting support;    a semiconductor device stiffener mounted on said semiconductor mounting support, said stiffener having been provided with an opening, said opening having adequate size for insertion of said semiconductor device; and    a heat spreader having a first and a second surface, said first surface of said heat spreader having been provided with a pattern of grooves, said pattern of grooves comprising at least one groove dividing the surface area of said first surface in sections, the first surface of said heat spreader having been positioned over the surface of said semiconductor device.    
     
     
         18 . The semiconductor package of  claim 17  wherein said semiconductor device mounting support is selected from the group consisting of a Printed Circuit Board and a metallized structure and a glass substrate.  
     
     
         19 . The semiconductor package of  claim 17  wherein said pattern of grooves comprises two grooves provided at distances from side boundaries of said first surface.  
     
     
         20 . The semiconductor package of  claim 17  wherein said pattern of grooves comprises four grooves, a first and a second of said four grooves intersecting a third and a fourth of said four grooves, said first and said second of said four grooves being provided at a distance from side boundaries of said first surface in accordance with a first equation, said third and said fourth of said four grooves being provided at a distance from side boundaries of said first surface in accordance with a second equation.  
     
     
         21 . The semiconductor package of  claim 17  wherein said pattern of grooves comprises a multiplicity of grooves, a first half of said multiplicity of grooves intersecting a second half of said multiplicity of grooves, said first half of said multiplicity of grooves being provided at distances from side boundaries of said first surface in accordance with a first equation, said second half of said multiplicity of grooves being provided at a distance from side boundaries of said first surface in accordance with a second equation.