Processing multiply-accumulate operations in a single cycle

Abstract

A multiply-accumulate unit, or MAC, may achieve high throughput. The MAC need not use redundant hardware, such as multiple Wallace trees, or pipelining logic, yet may perform Wallace tree and carry look-ahead adder functions simultaneously for different operations.

What is claimed is:  
     
         1 . A method comprising: 
 receiving a first set of operands into a multiply-accumulate unit;    performing a first operation on the first set of operands to arrive at a first intermediate result;    receiving a second set of operands into the multiply-accumulate unit; and    performing the first operation on the second set of operands to arrive at a second intermediate result while performing a second operation on the first intermediate result.    
     
     
         2 . The method of  claim 1 , wherein receiving a first set of operands further comprises: 
 receiving a multiplier into a Booth encoder; and    receiving a multiplicand into an array of multiplexers.    
     
     
         3 . The method of  claim 2 , wherein performing a first operation on the first set of operands further comprises sending a plurality of control signals from the Booth encoder to the array of multiplexers.  
     
     
         4 . The method of  claim 2 , wherein performing a first operation on the first set of operands further comprises sending a plurality of partial products from the array of multiplexers to a Wallace tree.  
     
     
         5 . The method of  claim 4 , wherein receiving a first set of operands further comprises receiving an accumulate value into the Wallace tree.  
     
     
         6 . The method of  claim 5 , wherein performing a first operation on the first set of operands further comprises invoking a plurality of carry-save adders in the Wallace tree upon receipt of the plurality of partial products and the accumulate value.  
     
     
         7 . The method of  claim 1 , wherein performing a second operation on the first intermediate result further comprises: 
 receiving the first intermediate result as a first portion and a second portion; and    adding the first portion and the second portion together.    
     
     
         8 . The method of  claim 7 , wherein performing a second operation on the first intermediate result further comprises: 
 sending the first portion and the second portion to a carry look-ahead adder; and    invoking the carry look-ahead adder.    
     
     
         9 . An apparatus, comprising: 
 a structure for performing multiple addition operations;    an adder; and    a controller which permits a first operation to be performed on a portion of a first operand using the structure while the adder is performing a second operation on another portion of the first operand.    
     
     
         10 . The apparatus of  claim 9 , further comprising an internal storage medium coupled to the adder.  
     
     
         11 . The apparatus of  claim 9 , wherein the structure for performing multiple addition operations comprises a Wallace tree.  
     
     
         12 . The apparatus of  claim 11 , wherein the Wallace tree comprises a plurality of carry-save adders.  
     
     
         13 . The apparatus of  claim 12 , wherein the Wallace tree is a four-stage Wallace tree.  
     
     
         14 . The apparatus of  claim 9 , wherein the adder is a carry look-ahead adder.  
     
     
         15 . The apparatus of  claim 9 , further comprising a Booth encoder coupled to the structure for performing multiple addition operations.  
     
     
         16 . The apparatus of  claim 12 , wherein the Wallace tree receives nine input vectors and produces two output vectors.  
     
     
         17 . The apparatus of  claim 10 , wherein the internal storage medium comprises one or more accumulators.  
     
     
         18 . The apparatus of  claim 17 , wherein one or more accumulators are coupled to the output of the adder.  
     
     
         19 . An apparatus comprising: 
 a Wallace tree;    an adder; and    a controller that sends a plurality of signals to cause the Wallace tree to execute a part of an instruction while the adder executes another part of the instruction.    
     
     
         20 . The apparatus of  claim 19 , wherein the adder is a carry look-ahead adder.  
     
     
         21 . The apparatus of  claim 20 , wherein the Wallace tree receives packed-data instructions.  
     
     
         22 . The apparatus of  claim 20 , further comprising a Booth encoder coupled to the Wallace tree.  
     
     
         23 . An article comprising a medium storing instructions that cause a processor-based system to: 
 receive a first set of operands into a multiply-accumulate unit;    perform a first operation on the first set of operands to arrive at a first result;    receive a second set of operands into the multiply-accumulate unit; and    performing the first operation on the second set of operands to arrive at a second result while performing a second operation on the first result.    
     
     
         24 . The article of  claim 23 , further storing instructions that cause a processor-based system to receive a first set of operands by receiving a multiplier into a Booth encoder.  
     
     
         25 . The article of  claim 24 , further storing instructions that cause a processor-based system to receive a first set of operands by receiving a multiplicand into an array of multiplexers.  
     
     
         26 . The article of  claim 25 , further storing instructions that cause a processor-based system to perform a first operation on the first set of operands by sending a plurality of control signals from the Booth encoder to the array of multiplexers.  
     
     
         27 . The article of  claim 25 , further storing instructions that cause a processor-based system to perform a first operation on the first set of operands by sending a plurality of partial products from the array of multiplexers to a Wallace tree.  
     
     
         28 . The article of  claim 27 , further storing instructions that cause a processor-based system to receive a first set of operands by receiving an accumulate value into the Wallace tree.  
     
     
         29 . The article of  claim 28 , further storing instructions that cause a processor-based system to perform a first operation on the first set of operands by invoking a plurality of carry-save adders in the Wallace tree upon receipt of the plurality of partial products and the accumulate value.  
     
     
         30 . The article of  claim 23 , further storing instructions that cause a processor-based system to perform a second operation on the first result by: 
 receiving the first result as a first portion and a second portion; and    sending the first portion and the second portion to a carry look-ahead adder; and    adding the first portion and the second portion together in the carry look-ahead adder.