Package module for an IC device and method of forming the same

Abstract

A package module of an IC device comprises a substrate, at least one semiconductor device, and an interconnected layer. The substrate has a first surface and a second surface, wherein the substrate further contains a plurality of metal plugs, which penetrate the substrate and connect the first surface and the second surface. The semiconductor device is located on the first surface of the substrate, wherein the semiconductor device contains a plurality of metal pads, each of which is connected to one of the metal plugs. The interconnected layer is formed on the second surface of the substrate, wherein the interconnected layer is comprised of a plurality of metal circuits, a plurality of land pads, and a plurality of via pads, wherein each of the metal plugs is connected to one of the metal circuits.

What is claimed is:  
     
         1 . A package module for an IC device, comprising: 
 a substrate, having a first surface and a second surface; wherein said substrate further contains a plurality of metal plugs, which penetrate said substrate and connect the interconnected layer on the said second surface and the semiconductor device on the said first surface; a semiconductor device, which is located on said first surface of said substrate; wherein said semiconductor device contains a plurality of metal pads, each of which is connected to one of said metal plugs;    an interconnect layer, which is formed on said second surface of said substrate; wherein said interconnected layer is comprised of a plurality of metal circuits, a plurality of land pads, and a plurality of via pads, wherein each of said metal plugs is connected to one of said metal circuits.    
     
     
         2 . The package module of  claim 1 , wherein said substrate has a CTE (Coefficient of Thermal Expansion) close to that of said semiconductor device and is composed of an insulator.  
     
     
         3 . The package module of  claim 1 , further comprising a glue layer, which is formed on said first surface of said substrate to agglutinate said semiconductor device to said substrate.  
     
     
         4 . The package module of  claim 3 , wherein said glue layer has a CTE (Coefficient of Thermal Expansion) lower than 15 ppm/° C. and is used for adhesive purposes.  
     
     
         5 . The package module of  claim 1 , wherein said package module further comprises a metal layer which is formed on the exposed area of said first surface of said substrate and covers said semiconductor device.  
     
     
         6 . The package module of  claim 1 , wherein said package module further comprises an insulating layer which is formed on said second surface of said substrate to cover and protect said metal circuits.  
     
     
         7 . The package module of  claim 1 , wherein said package module further comprises a solder ball on each of said land pads.  
     
     
         8 . A package module of a plurality of IC devices, comprising: 
 a substrate, having a first surface and a second surface; wherein said substrate further contains a plurality of metal plugs, which penetrate said substrate and connect the interconnected layer on the said second surface and the semiconductor devices on the said first surface; a plurality of semiconductor devices, which are located on said first surface of said substrate; wherein each of said semiconductor devices contains a plurality of metal pads, each of which is connected to one of said metal plugs;    an interconnected layer, which is formed on said second surface of said substrate; wherein said interconnected layer is comprised of a plurality of metal circuits, a plurality of land pads, and a plurality of via pads, wherein each of said metal plugs is connected to one of said metal circuits.    
     
     
         9 . The package module of  claim 8 , wherein said substrate has a CTE (Coefficient of Thermal Expansion) close to that of the semiconductor device and is composed of an insulator.  
     
     
         10 . The package module of  claim 8 , further comprising a glue layer, which is formed on said first surface of said substrate to agglutinate said semiconductor devices to said substrate.  
     
     
         11 . The package module of  claim 10 , wherein said glue layer has a CTE (Coefficient of Thermal Expansion) lower than 15 ppm/° C. and is used for adhesive purposes.  
     
     
         12 . The package module of  claim 8 , wherein said package module further comprises a metal layer which is formed on the exposed area of said first surface of said substrate and to cover said semiconductor devices.  
     
     
         13 . The package module of  claim 8 , wherein said package module further comprises an insulating layer which is formed on said second surface of said substrate to cover and protect said metal circuits.  
     
     
         14 . The package module of  claim 8 , wherein said package module further comprises a solder ball on each of said land pads.  
     
     
         15 . A method of forming a package module of at least one IC device, comprising: 
 providing a substrate, having a first surface and a second surface;    placing and affixing at least one semiconductor device with a plurality of metal pads on said first surface of said substrate;    performing a laser alignment procedure, and then performing a laser drilling process from said second surface of said substrate to form a plurality of via holes, each of which is aligned to and touches one of said metal pads;    performing a cleaning process to clean the said second surface of said substrate and the inner surfaces of the said via holes;    forming a metal layer on said second surface of said substrate, and also filling into said via holes to form a plurality of metal plugs, each of which is connected to one metal pad of said semiconductor device;    forming an interconnected layer on said second surface of said substrate by performing a photo lithographic process and an etching process on the metal layer; wherein said interconnected layer is composed of a plurality of metal circuits, a plurality of land pads, and a plurality of via pads.    
     
     
         16 . The method of  claim 15 , further comprising a process for forming an insulating layer on said second surface of said substrate to cover and protect said metal circuits.  
     
     
         17 . The method of  claim 16 , further comprising a process for forming a solder ball on each of said land pads.  
     
     
         18 . The method of  claim 15 , further comprising a process for forming a metal layer on the exposed area of said first surface of said substrate and to cover said semiconductor device.  
     
     
         19 . The method of  claim 15 , wherein said laser alignment procedure can be preformed by an optical camera from said second surface of said substrate, whenever said substrate is composed of translucent material.  
     
     
         20 . The method of  claim 15 , wherein said laser alignment procedure can be preformed by an X-ray camera from said second surface of said substrate, whenever said substrate is composed of an optically nontransparent material.