US2003164303A1PendingUtilityA1

Method of metal electro-plating for IC package substrate

Priority: Mar 4, 2002Filed: Nov 7, 2002Published: Sep 4, 2003
Est. expiryMar 4, 2022(expired)· nominal 20-yr term from priority
H05K 3/427H05K 3/282H05K 2201/0352H05K 2203/1476H05K 3/243H05K 3/064
37
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Claims

Abstract

A method of metal-electro-plating for IC package substrate comprising the steps of: forming vias on the package substrate coated with copper film on both sides thereof; electro-plating the vias to form electrical conductive holes between the top layer and the bottom layer of the package substrate; coating a resisting agent where the patterns should be formed on the top layer and on the entire bottom layer of the package substrate; etching the pattern to form circuit without plating lines on the top layer of the substrate, and removing the resisting agent; coating with a resisting agent on the top side and the bottom side of the package substrate but the wiring position to be electro-plated as surface finish for wire-bonding electro-plating on the top side of the package substrate not being applied with the resisting agent; electro-plating the substrate with nickel and gold, and removing the resisting agent; fabricating the circuit on the bottom side of the package substrate and coating with a resisting agent to cover the entire top side and where the circuit is to be formed on the bottom side; etching the substrate to obtain the circuit on the bottom side of the package substrate; and coating solder resist on the region other than the circuit section and applying pre-flux onto the circuit section to form into a protective film.

Claims

exact text as granted — not AI-modified
I claim:  
     
         1 . A method of metal electro-plating for IC package substrate comprising the steps of: 
 (a) forming vias on the package substrate coated with copper film on both sides thereof;    (b) electro-plating the vias to form electrical conductive holes between the top layer and the bottom layer of the package substrate;    (c) coating a resisting agent where the patterns should be formed on the top layer and on the entire bottom layer of the package substrate;    (d) etching the pattern to form circuit without plating lines on the top layer of the substrate, and removing the resisting agent;    (e) coating with a resisting agent on the top side and the bottom side of the package substrate but the wiring position to be electro-plated as surface finish for wire-bonding electro-plating on the top side of the package substrate not being applied with the resisting agent;    (f) electro-plating the substrate with nickel and gold, and removing the resisting agent;    (g) fabricating the circuit on the bottom side of the package substrate and coating with a resisting agent to cover the entire top side and where the circuit is to be formed on the bottom side;    (h) etching the substrate to obtain the circuit on the bottom side of the package substrate; and    (i) coating solder resist on the region other than the circuit section and applying pre-flux onto the circuit section to form into a protective film.

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