Capacitor for semiconductor device, manufacturing method thereof, and electronic device employing the same

Abstract

A capacitor for use in a semiconductor device, a method of fabricating the capacitor, and an electronic device adopting the capacitor, wherein the capacitor includes upper and lower electrodes, each formed of a platinum group metal; a thin dielectric layer disposed between the upper and lower electrodes; and a buffer layer disposed between the lower electrode and the thin dielectric layer, the buffer layer including a metal oxide of Group 3, 4, or 13. In the capacitor of the present invention, oxidization of the lower electrode may be suppressed, and excellent characteristics of the thin dielectric layer may be maintained.

What is claimed is:  
     
         1 . A capacitor for use in a semiconductor device comprising: 
 upper and lower electrodes, each formed of a platinum group metal;    a thin dielectric layer disposed between the upper and lower electrodes; and    a buffer layer disposed between the lower electrode and the thin dielectric layer, the buffer layer including a metal oxide of Group 3, 4, or 13.    
     
     
         2 . The capacitor as claimed in  claim 1 , wherein the metal oxide of Group 3, 4, or 13 is at least one selected from the group consisting of TiO 2 , Al 2 O 3 , Ta 2 O 5 , and HfO 2 .  
     
     
         3 . The capacitor as claimed in  claim 1 , wherein the thin dielectric layer is comprised of SrTiO 3 , BaTiO 3 , or Pb(Zr,Ti)O 3 .  
     
     
         4 . The capacitor as claimed in  claim 1 , wherein the platinum metal is at least one selected from the group consisting of Ru, Os, Ir, and Pt.  
     
     
         5 . A method of fabricating a capacitor for use in a semiconductor device, the method comprising: 
 forming a buffer layer on a lower electrode of a platinum group metal by performing an atomic layer deposition (ALD) process using a precursor for the buffer layer;    forming a thin dielectric layer by performing the ALD process using a precursor for a thin dielectric layer on the buffer layer; and    forming an upper electrode of a platinum group metal on the thin dielectric layer.    
     
     
         6 . The method as claimed in  claim 5 , wherein the precursor for the buffer layer is comprised of Ti(i-OPr) 2 (tmhd) 2  (where tmhd indicates tetramethylheptanedionate, and i-OPr indicates isopropoxy), Al(CH 3 ) 3  or Hf(OBu) 4  (where n-OBu indicates n-butoxide).  
     
     
         7 . The method as claimed in  claim 5 , wherein the ALD process for forming the buffer layer is performed at a temperature of between about 200-500° C.  
     
     
         8 . The method as claimed in  claim 5 , wherein the precursor for the thin dielectric layer is comprised of at least one selected from the group consisting of Sr(tmdh) 2 , Sr(methd) 2 , TiO(tmhd) 2 , and Ti(i-OPr) 2 (tmhd) 2 , (where tmhd indicates tetramethylheptanedionate, methd indicates methoxyethoxy tetramethylheptanedionate and i-OPr indicates isopropoxy).  
     
     
         9 . A method of fabricating a capacitor comprising: 
 absorbing CO on a surface of a lower electrode of a platinum group metal;    placing the lower electrode under a reducing atmosphere to produce a lattice oxygen;    using the lattice oxygen to form a thin dielectric layer by performing an ALD process using a precursor for the thin dielectric layer; and    forming an upper electrode of a platinum group metal on the thin dielectric layer.    
     
     
         10 . The method as claimed in  claim 9 , wherein the precursor for the thin dielectric layer is comprised of at least one selected from the group consisting of Sr(tmdh) 2 , Sr(methd) 2 , TiO(tmdh) 2 , and Ti(i-OPr) 2 (tmdh) 2 , (where tmhd indicates tetramethylheptanedionate, methd indicates methoxyethoxy tetramethylheptanedionate and i-OPr indicates isopropoxy).  
     
     
         11 . The method as claimed in  claim 9 , wherein the reducing atmosphere is maintained at a temperature of between about 100-500° C.  
     
     
         12 . An electronic device adopting a capacitor for a semiconductor device, the capacitor comprising: 
 upper and lower electrodes, each formed of a platinum group metal;    a thin dielectric layer disposed between the upper and lower electrodes; and    a buffer layer disposed between the lower electrode and the thin dielectric layer, the buffer layer including a metal oxide of Group 3, 4, or 13.    
     
     
         13 . The electronic device as claimed in  claim 12 , wherein the metal oxide of a Group 3, 4, or 13 is at least one selected from the group consisting of TiO 2 , Al 2 O 3 , Ta 2 O 5 , and HfO 2 .  
     
     
         14 . The electronic device as claimed in  claim 12 , wherein the thin dielectric layer is comprised of SrTiO 3 , BaTiO 3 , or Pb(Zr,Ti)O 3 .  
     
     
         15 . The electronic device as claimed in  claim 12 , wherein the platinum group metal is at least one selected from the group consisting of Ru, Os, Ir, and Pt.  
     
     
         16 . The electronic device as claimed in  claim 12 , wherein the electronic device is a dynamic RAM (DRAM) or non-volatile memory (FRAM).