Finger metal-insulator-metal capacitor with local interconnect

Abstract

The present invention includes a method of constructing a novel capacitor and geometry for the capacitor. The method and device include forming a multilayer structure having what generally can be described as a wave shape. Particular aspects of the present invention are described in the claims, specification and drawings.

We claim as follows:  
     
         1 . A method of manufacturing a wave-shaped capacitor over a base conductive layer, said base conductive layer over a base insulator layer on a die, including: 
 patterning the base conductive layer to form at least two adjacent trenches;    forming a multilayer structure, conformed to the trenches and isolated from adjacent structures, including at least a first plate layer, an insulating layer over the first plate layer, and a second plate layer over the insulating layer, wherein at least part of the first plate layer is in electrical communication with the base conductive layer;    
     
     
         2 . forming interconnects on the die, including at least one interconnect with the second plate layer.  
     
     
         3 . The method of  claim 1 , in which the trenches are formed by one or more lithographic or direct writing processes and the multilayer structure has a thickness along the sidewalls of the trenches that is less than a minimum feature size of the lithographic or direct writing process.  
     
     
         4 . The method of  claim 1 , in which the trenches are formed by one or more lithographic or direct writing processes and the multilayer structure has a thickness along the sidewalls of the trenches that is less than half a minimum feature size of the lithographic or direct writing processes.  
     
     
         5 . The method of  claim 1 , wherein the first and second plate layers are sputtered metals.  
     
     
         6 . The method of  claim 5 , wherein one or more of the sputtered metals comprise titanium nitride.  
     
     
         7 . The method of  claim 5 , wherein the insulating layer is formed by vapor deposition.  
     
     
         8 . The method of  claim 1 , wherein the at least two adjacent trenches, in cross-section, form an essentially rectangular wave shape.  
     
     
         9 . The method of  claim 8 , wherein the at least two adjacent trenches are etched at least substantially through the base conductive layer.  
     
     
         10 . The method of  claim 1 , wherein the interconnects are formed in manufacturing steps that are the same for the multilayer structure and for other structures on the die.  
     
     
         11 . The method of  claim 11 , in which the trenches are formed by one or more lithographic or direct writing processes and the multilayer structure has a thickness along the sidewalls of the trenches that is less than a minimum feature size of the lithographic or direct writing process.  
     
     
         12 . The method of  claim 11 , in which the trenches are formed by one or more lithographic or direct writing processes and the multilayer structure has a thickness along the sidewalls of the trenches that is less than half a minimum feature size of the lithographic or direct writing processes.  
     
     
         13 . The method of  claim 11 , wherein the first and second plate layers are sputtered metals.  
     
     
         14 . The method of  claim 13 , wherein one or more of the sputtered metals comprise titanium nitride.  
     
     
         15 . The method of  claim 13 , wherein the insulating layer is formed by vapor deposition.  
     
     
         16 . The method of  claim 11 , wherein the at least two adjacent trenches, in cross-section, form an essentially rectangular wave shape.  
     
     
         17 . The method of  claim 16 , wherein the at least two adjacent trenches are at least substantially through the base conductive layer.  
     
     
         18 . The method of  claim 11 , wherein the interconnects are formed in manufacturing steps that are the same for the multilayer structure and for other structures on the die.  
     
     
         19 . The method of  claim 11 , wherein the base conductive layer and the first plate layer are the same structure.  
     
     
         20 . A wave-shaped capacitor, formed over a base conductive layer, said base conductive layer over a base insulator layer on a die, the capacitor including: 
 a wave-shaped pattern in the base conductive layer comprising at least two adjacent trenches in the base conductive layer;    a multilayer structure contoured over the base conductive layer, the multilayer structure comprising:    a first plate layer in electrical contact with the base conductive layer; 
 an insulating layer over the first plate layer;  
 a second plate layer over the insulating layer; and  
   a interconnect layer over the multilayer structure, including at least one interconnection with the second plate layer.    
     
     
         21 . The device of  claim 20 , wherein the at least two adjacent trenches are formed by a lithographic or direct writing process and the multilayer structure has a thickness along the sidewalls of the trench that is less than half of a minimum feature size of the lithographic or direct writing process.  
     
     
         22 . The device of  claim 20 , wherein the base conductive layer and the first conductive layer are the same structure.  
     
     
         23 . The device of  claim 22 , wherein the at least two adjacent trenches are formed by a lithographic process and the multilayer structure has a thickness along the sidewalls of the trench that is less than half of a minimum feature size of the lithographic or direct writing process.