US2003153149A1PendingUtilityA1
Floating gate nitridation
Priority: Feb 8, 2002Filed: Feb 8, 2002Published: Aug 14, 2003
Est. expiryFeb 8, 2022(expired)· nominal 20-yr term from priority
H10D 64/035H10D 30/0411
37
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Claims
Abstract
The floating gate, or the oxide between the floating and control gates, or both are nitrided before the control gate layer is deposited.
Claims
exact text as granted — not AI-modified1 . A method for manufacturing an integrated circuit comprising a nonvolatile memory, the method comprising:
forming a first layer comprising silicon, the first layer being to provide one or more floating gates for the nonvolatile memory; nitriding a surface of the first layer to incorporate nitrogen atoms into said surface; forming a first dielectric at the nitrided surface, wherein forming the first dielectric comprises forming silicon oxide at the nitrided surface; forming a conductive layer separated from the nitrided surface by the first dielectric, the conductive layer providing one or more control gates for the nonvolatile memory.
2 . The method of claim 1 wherein forming the silicon oxide at the nitrided surface comprises forming the silicon oxide by thermal oxidation.
3 . The method of claim 1 wherein the surface of the first layer is a polysilicon surface.
4 . An integrated circuit manufactured by the method of claim 1 .
5 . An integrated circuit comprising a nonvolatile memory cell:
a channel region; a first dielectric on a surface of the channel region; a conductive floating gate on the first dielectric, the floating gate having a surface which has silicon and nitrogen atoms therein; silicon oxide formed at said surface of the floating gate; a conductive control gate opposite to said surface of the floating gate.
6 . The integrated circuit of claim 5 further comprising a second dielectric between said surface of the floating gate and the control gate.
7 . A method for manufacturing an integrated circuit comprising a nonvolatile memory, the method comprising:
forming a first layer to provide one or more floating gates for the nonvolatile memory; forming a first dielectric on a surface of the first layer, wherein the first dielectric comprises a first surface comprising silicon oxide; nitriding the first surface of the first dielectric to incorporate nitrogen atoms into the first surface; forming a conductive layer on the nitrided first surface of the first dielectric, the conductive layer providing one or more control gates for the nonvolatile memory.
8 . An integrated circuit manufactured by the method of claim 7 .
9 . An integrated circuit comprising a nonvolatile memory cell comprising:
a channel region; a first dielectric on a surface of the channel region; a conductive floating gate on the first dielectric; a second dielectric on a surface of the floating gate; and a conductive control gate separated from the floating gate by the second dielectric; wherein the second dielectric comprises a layer of silicon oxide having a surface having nitrogen atoms embedded therein; and the control gate contacts said silicon oxide surface with nitrogen atoms.Join the waitlist — get patent alerts
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