Method of using a pinned photodiode five transistor pixel
Abstract
A method of using a pinned photodiode pixel for high-speed motion-capture CMOS image sensors uses a pinned photodiode in a five-transistor pixel so that the channel region of the photodiode is completely voided of charge after reset and readout operations. An exemplary method includes applying an exposure control clock signal to a gate electrode of an exposure control transistor of a five-transistor pixel, applying a pixel preset voltage to a drain of the exposure control transistor, and switching the exposure control clock signal. The exposure control transistor is coupled between a pinned photodiode of the pixel and the pixel preset voltage. The switching the exposure control clock signal turns off the exposure control transistor at a beginning of an integration cycle after substantially all signal charge has drained out of the pinned photodiode and across the exposure control transistor so that the pinned photodiode is fully voided of majority carriers.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method comprising:
applying an exposure control clock signal to a gate electrode of an exposure control transistor of a five-transistor pixel, the exposure control transistor being coupled between a pinned photodiode of the pixel and a preset voltage; applying the pixel preset voltage to a drain of the exposure control transistor; and switching the exposure control clock signal to turn off the exposure control transistor at a beginning of an integration cycle after substantially all signal charge has drained out of the pinned photodiode and across the exposure control transistor so that the pinned photodiode is fully voided of majority carriers.
2 . The method of claim 1 , further comprising applying a transfer clock signal to a gate electrode of a transfer gate transistor at an end of the integration cycle.
3 . The method of claim 2 , wherein the application of the transfer clock signal causes substantially all integrated signal charge to transfer from the pinned photodiode to a storage node so that the pinned photodiode is fully voided of majority carriers.
4 . A method comprising:
draining substantially all charge from a pinned photodiode in a five transistor pixel into a preset drain before a beginning of an integration cycle; isolating the pinned photodiode at the beginning of the integration cycle; transferring substantially all charge from the pinned photodiode into a storage node at an end of the integration cycle.
5 . The method of claim 4 , wherein the draining includes applying an exposure control clock signal to a gate electrode of an exposure control transistor in the five transistor pixel.
6 . The method of claim 5 , wherein the transferring includes applying a transfer clock signal to a gate electrode of a transfer gate transistor in the five transistor pixel.
7 . The method of claim 4 , wherein the transferring includes applying a transfer clock signal to a gate electrode of a transfer gate transistor in the five transistor pixel.
8 . A method of using a five transistor pixel comprising:
draining substantially all of a prior charge from a pinned photodiode through an exposure control gate transistor of the five transistor pixel; and integrating a first charge on the pinned photodiode during an integration fraction of a first readout interval.
9 . The method of claim 8 , further comprising transferring substantially all of the first charge from the pinned photodiode to a storage node at an end of the first readout interval.
10 . The method of claim 9 , further comprising:
reading out the first charge from the storage node during a second readout interval; and integrating a second charge on the pinned photodiode during an integration fraction of the second readout interval.
11 . The method of claim 8 , wherein the integration fraction is less than a whole of the first readout interval.
12 . A method of using a five transistor pixel comprising:
integrating a first charge on a pinned photodiode of the five transistor pixel during an integration fraction of a first readout interval; and transferring substantially all of the first charge from the pinned photodiode to a storage node at an end of the first readout interval.
13 . The method of claim 12 further comprising:
reading out the first charge from the storage node during a second readout interval; and
integrating a second charge on the pinned photodiode during an integration fraction of the second readout interval.
14 . The method of claim 12 , wherein the integration fraction is less than a whole of the first readout interval.
15 . A method comprising:
applying an exposure control clock signal to a gate electrode of an exposure control transistor of a five transistor pixel; switching the exposure control clock signal to turn off the exposure control transistor at a beginning of an integration cycle; and applying a transfer clock signal to a gate electrode of a transfer gate transistor at an end of the integration cycle.
16 . The method of claim 15 , wherein the application of the transfer clock signal causes the transfer gate transistor to transfer substantially all of an integrated signal charge from a pinned photodiode to a storage node.Join the waitlist — get patent alerts
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