Voltage reference circuit layout inside multi-layered substrate

Abstract

A multi-layered substrate having a voltage reference signal circuit layout therein. A major change in the design of the multi-layered substrate is the moving of a voltage reference signal trace from a signal layer to a non-signaling layer. Once the voltage reference signal trace is moved, the signal traces within the signal layer can have a larger layout area. Similarly, the voltage reference signal trace within the non-signaling layer can have greater layout flexibility in addition to electromagnetic shielding from other signal traces. Moreover, the voltage reference signal trace having a greater width may be used to reduce parasitic resistance within the voltage reference signal circuit.

1 . A multi-layered substrate having a voltage reference signal circuit layout therein, comprising: 
 a first layer having a plurality of signal traces;    a second layer having at least one conductive plane;    a third layer having at least one conductive plane and a voltage reference signal trace; and    a fourth layer having a plurality of signal traces.    
     
     
         2 . The multi-layered substrate of  claim 1 , wherein the conductive plane at the second layer is a ground plane.  
     
     
         3 . The multi-layered substrate of  claim 1 , wherein the conductive plane at the second layer is a power plane.  
     
     
         4 . The multi-layered substrate of  claim 1 , wherein the conductive plane at the third layer is a ground plane.  
     
     
         5 . The multi-layered substrate of  claim 1 , wherein the conductive plane at the third layer is a power plane.  
     
     
         6 . The multi-layered substrate of  claim 1 , wherein the voltage reference signal trace is surrounded by the conductive plane at the third layer.  
     
     
         7 . The multi-layered substrate of  claim 1 , wherein the substrate further at least one layer having a plurality of signal traces between the second layer and the third layer.  
     
     
         8 . The multi-layered substrate of  claim 1 , wherein the substrate further a layer having at least one ground plane and a plurality of signal traces between the first layer and the second layer.  
     
     
         9 . The multi-layered substrate of  claim 1 , wherein the substrate further a layer having at least one power plane and a plurality of signal traces between the third layer and the fourth layer.  
     
     
         10 . The multi-layered substrate of  claim 1 , wherein the first layer further includes a voltage reference signal trace.  
     
     
         11 . A multi-layered substrate having a voltage reference signal circuit layout therein, comprising: 
 a first signal layer having a plurality of signal traces;    a second signal layer having a plurality of signal traces; and    at least one non-signaling layer between the first signal layer and the second signal layer, wherein a voltage reference signal trace is in one of the non-signaling layers.    
     
     
         12 . The multi-layered substrate of  claim 11 , wherein the non-signaling layer includes at least one power plane.  
     
     
         13 . The multi-layered substrate of  claim 11 , wherein the non-signaling layer includes at least one ground layer plane.  
     
     
         14 . The multi-layered substrate of  claim 11 , wherein the non-signaling layer includes at least one power plane and a plurality of signal traces.  
     
     
         15 . The multi-layered substrate of  claim 11 , wherein the non-signaling layer includes at least one ground layer plane and a plurality of signal traces.  
     
     
         16 . A multi-layered substrate having a voltage reference signal circuit layout therein, comprising: 
 at least one signal layer having a plurality of signal traces;    a non-signaling layer having a voltage reference signal trace; and    a conductive plane between the signal layer and the non-signaling layer.    
     
     
         17 . The multi-layered substrate of  claim 16 , wherein the non-signaling layer includes at least one power plane.  
     
     
         18 . The multi-layered substrate of  claim 16 , wherein the non-signaling layer includes at least one ground layer plane.  
     
     
         19 . The multi-layered substrate of  claim 16 , wherein the non-signaling layer includes at least one power plane and a plurality of signal traces.  
     
     
         20 . The multi-layered substrate of  claim 16 , wherein the non-signaling layer includes at least one ground layer plane and a plurality of signal traces.  
     
     
         21 . The multi-layered substrate of  claim 16 , wherein the conductive plane includes a ground plane.  
     
     
         22 . The multi-layered substrate of  claim 16 , wherein the conductive plane includes a power plane.  
     
     
         23 . A multi-layered substrate having a voltage reference signal circuit layout therein, comprising: 
 at least one signal layer having a plurality of signal traces; and    at least one non-signaling layer having a voltage reference signal trace.    
     
     
         24 . The multi-layered substrate of  claim 23 , wherein the non-signaling layer includes at least one ground layer plane.  
     
     
         25 . The multi-layered substrate of  claim 23 , wherein the non-signaling layer includes at least one power plane and a plurality of signal traces.  
     
     
         26 . The multi-layered substrate of  claim 23 , wherein the non-signaling layer includes at least one ground layer plane and a plurality of signal traces.