Cylinder-type capacitor for a semiconductor device

Abstract

A cylinder-type capacitor of a semiconductor device includes a lower electrode that is formed of a conductive layer which directly contacts a conductive region on a semiconductor substrate. The lower electrode comprises a first cylinder in contact with the conductive region and a second cylinder on and in contact with the first cylinder, the second cylinder being larger in width than the first cylinder. A dielectric layer is on the lower electrode. An upper electrode is on the dielectric layer. The upper electrode extends into the first and second cylinders. According to the present invention, a semiconductor cylinder-type capacitor is provided at a relatively low production cost using simplified fabrication processes.

What is claimed is:  
     
         1 . A cylinder-type capacitor of a semiconductor device comprising: 
 a lower electrode formed of a conductive layer which directly contacts a conductive region on a semiconductor substrate, wherein the lower electrode comprises a first cylinder in contact with the conductive region and a second cylinder on, and in contact with, the first cylinder, the second cylinder being larger in width than the first cylinder;    a dielectric layer on the lower electrode; and    an upper electrode on the dielectric layer, wherein the upper electrode extends into the first and second cylinders.    
     
     
         2 . The capacitor according to  claim 1 , wherein the conductive region comprises an active region on the surface of the semiconductor substrate or a contact pad above the semiconductor substrate.  
     
     
         3 . The capacitor according to  claim 1 , wherein the conductive region comprises a contact pad that is self-aligned by two neighboring gate electrodes formed on the semiconductor substrate.  
     
     
         4 . The capacitor according to  claim 3 , wherein the gate electrodes comprise a polycide structure in which a silicide layer is formed on a polysilicon layer.  
     
     
         5 . The capacitor according to  claim 1 , wherein the conductive layer comprises a polysilicon layer.  
     
     
         6 . The capacitor according to  claim 1 , wherein the lower electrode includes hemispherical grains (HSGs) on the surface thereof.  
     
     
         7 . The capacitor according to  claim 1 , wherein the dielectric layer is formed of one of a Al 2 O 3  layer, a Ta 2 O 5  layer, a SrTiO 3  (STO) layer, a (Ba, Sr)TiO 3  (BST) layer, a PbTiO 3  layer, Pb(Zr, Ti)O 3 (PZT) layer, a SrBi 2 Ta 2 O 9 (SBT) layer, a (Pb,La)(Zr,Ti)O 3  layer, and a BaTiO 3 (BTO) layer.  
     
     
         8 . The capacitor according to  claim 1 , wherein the dielectric layer is formed of one of a triple layer comprising a silicon oxide layer, a silicon nitride layer, and a silicon oxide layer, and a double layer comprising a silicon nitride layer and a silicon oxide layer.  
     
     
         9 . The capacitor according to  claim 1 , wherein the upper electrode comprises a polysilicon layer.