US2003146490A1PendingUtilityA1

Semiconductor device and method of providing regions of low substrate capacitance

Assignee: SEMICONDUCTOR COMPONENTS INDPriority: Feb 7, 2002Filed: Feb 7, 2002Published: Aug 7, 2003
Est. expiryFeb 7, 2022(expired)· nominal 20-yr term from priority
H10D 84/80H10D 84/00H10W 10/0143H10W 10/021H10W 10/20H10W 10/17H10D 84/40
29
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor device ( 2 ) includes a semiconductor substrate ( 12 ) having a surface ( 13 ) formed with a first recessed region ( 20 ). A first dielectric material ( 60 ) is deposited in the first recessed region and formed with a second recessed region ( 76 ), and a second dielectric material ( 100 ) is grown over the first dielectric material to seal the second recessed region.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A semiconductor device, comprising: 
 a semiconductor substrate having a surface formed with a first recessed region;    a first dielectric material deposited in the first recessed region and formed with a second recessed region; and    a second dielectric material thermally grown over the first dielectric material to seal the second recessed region.    
     
     
         2 . The semiconductor device of  claim 1 , further comprising an active device formed in an active region of the semiconductor substrate.  
     
     
         3 . The semiconductor device of  claim 1 , further comprising an electrical component formed over the second recessed region.  
     
     
         4 . The semiconductor device of  claim 3 , wherein the electrical component comprises a passive device or bonding pad of the semiconductor device.  
     
     
         5 . The semiconductor device of  claim 1 , wherein the semiconductor substrate is formed with silicon.  
     
     
         6 . The semiconductor device of  claim 1 , wherein the first dielectric material includes deposited silicon dioxide.  
     
     
         7 . The semiconductor device of  claim 1 , wherein the second recessed region is formed having a third dielectric material deposited on the walls.  
     
     
         8 . The semiconductor device of  claim 1 , wherein the second dielectric material is formed with thermally grown silicon dioxide.  
     
     
         9 . The semiconductor device of  claim 1 , wherein the first dielectric material includes a cap layer.  
     
     
         10 . The semiconductor device of  claim 9 , wherein the cap layer includes a chemical vapor deposition film.  
     
     
         11 . The semiconductor device of  claim 1 , where the second recessed region extends into the semiconductor substrate to the depth of at least five micrometers.  
     
     
         12 . A method of making a semiconductor device, comprising the steps of: 
 masking a material to form dielectric pillars in a recessed region; and    oxidizing a cap layer to form a seal over regions between the dielectric pillars.    
     
     
         13 . The method of  claim 12  wherein the material is formed with deposited silicon dioxide.  
     
     
         14 . The method of  claim 12 , wherein the step of masking further comprises the steps of: 
 depositing the cap layer over the semiconductor material;    removing portions of the cap layer to expose the underlying semiconductor material; and    etching the exposed underlying semiconductor material to form the dielectric pillars.    
     
     
         15 . The method of  claim 14 , wherein the cap layer is formed with chemical vapor deposition film.  
     
     
         16 . The method of  claim 12 , wherein the step of oxidizing includes the step of thermally growing silicon dioxide.  
     
     
         17 . The method of  claim 12  further comprising the step of forming an electrical component over regions between the dielectric pillars after the step of oxidizing the cap layer.  
     
     
         18 . The method of  claim 17  wherein the electrical component comprises a passive device or bonding pad of the semiconductor device.  
     
     
         19 . The method of  claim 12 , wherein the step of oxidizing is performed after the step of depositing a dielectric onto the walls of the pillars  
     
     
         20 . The method of  claim 19  wherein the dielectric includes chemical vapor deposition film.  
     
     
         21 . The method of  claim 12 , further comprising the step of forming an active device in an active region of the semiconductor device after the step of oxidizing the cap layer.  
     
     
         22 . A method of fabricating an integrated circuit, comprising the steps of: 
 etching a first dielectric material deposited within a recessed region to form dielectric pillars;    growing a second dielectric material to form a seal over the dielectric pillars; and    forming a passive component over the second dielectric material.    
     
     
         23 . The method of  claim 22 , further comprising the step of depositing a semiconductor material over the dielectric pillars prior to the step of etching the first dielectric material.  
     
     
         24 . The method of  claim 23 , wherein the step of growing a second dielectric material includes the step of oxidizing the semiconductor material.  
     
     
         25 . The method of  claim 22 , wherein the passive component includes a bonding pad.

Join the waitlist — get patent alerts

Track US2003146490A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.