Semiconductor device, method of manufacturing semiconductor device and a method of manufacturing lead frame

Abstract

A semiconductor device includes a semiconductor chip, a resin package for sealing said semiconductor chip, metal layers provided on a mounting-side surface of said resin package in an exposed manner and connecting members for electrically connecting electrode pads provided on the semiconductor chip and the metal layers. The metal layers are provided with stud bumps on the mounting side, the stud bumps serving as external connection terminals.

What is claimed is:  
     
         1 . A semiconductor device comprising: 
 a semiconductor chip sealed in a resin; and    connecting members for electrically connecting said semiconductor chip and external connection terminals,    wherein said external connection terminals are stud bumps.    
     
     
         2 . A semiconductor device comprising: 
 a semiconductor chip;    a resin package for sealing said semiconductor chip;    metal layers provided on a mounting-side surface of said resin package in an exposed manner; and    connecting members for electrically connecting electrode pads provided on the semiconductor chip and the metal layers,    wherein said metal layers are provided with stud bumps on the mounting side, said stud bumps serving as external connection terminals.    
     
     
         3 . The semiconductor device as claimed in  claim 2 , wherein each of said metal layers has a single-layered structure and is made of one of gold (Au), palladium (Pd) and aluminum (Al).  
     
     
         4 . The semiconductor device as claimed in  claim 2 , wherein each of said metal layers has a double-layered structure having two layers each made of respective one of gold (Au), palladium (Pd) and aluminum (Al).  
     
     
         5 . The semiconductor device as claimed in  claim 2 , wherein each of said metal layers has a double-layered structure having an outer layer made of palladium (Pd) and an inner layer made of nickel (Ni).  
     
     
         6 . The semiconductor device as claimed in  claim 2 , wherein each of said metal layers has a triple-layered structure having three layers made of either a combination of an outer layer made of palladium (Pd), an intermediate layer made of nickel (Ni) and an inner layer made of palladium (Pd), or a combination of an outer layer made of gold (Au), an intermediate layer made of nickel (Ni) and an inner layer made of palladium (Pd).  
     
     
         7 . The semiconductor device as claimed in  claim 2 , wherein each of said metal layers has a quadruple-layered structure having four layers made of a combination of an outer layer made of palladium (Pd), a first intermediate layer made of nickel (Ni), a second intermediate layer made of palladium (Pd) and an inner layer made of gold (Au).  
     
     
         8 . A semiconductor device comprising: 
 a semiconductor chip;    a resin package for sealing said semiconductor chip; and    connecting members having one set of ends connected to electrode pads on said semiconductor chip and the other set of ends exposed from said resin package so as to form mounting-side ends,    wherein said mounting-side ends exposed from said resin package are provided with stud bumps, said stud bumps serving as external connection terminals.    
     
     
         9 . The semiconductor device as claimed in  claim 8 , wherein said connecting members are wires.  
     
     
         10 . The semiconductor device as claimed in  claim 9 , wherein the wires extend from the stud bumps and terminate at electrode pads on the semiconductor chip.  
     
     
         11 . The semiconductor device as claimed in  claim 8 , wherein the connecting member has a portion exposed from the resin package, said portion having an area greater than a joining area of the stud bump.  
     
     
         12 . A lead frame comprising: 
 metal layers provided on a surface of the lead frame,    wherein said metal layers being provided at positions corresponding to positions where the stud bumps are to be provided.    
     
     
         13 . The lead frame as claimed in  claim 12 , wherein each of said metal layers has a single-layered structure and is made of one of gold (Au), palladium (Pd) and aluminum (Al).  
     
     
         14 . The lead frame as claimed in  claim 12 , 
 wherein each of said metal layers has a double-layered structure having two layers each made of a respective one of gold (Au), palladium (Pd) and aluminum (Al).    
     
     
         15 . The lead frame as claimed in  claim 12 , 
 wherein each of said metal layers has a double-layered structure having an outer layer made of palladium (Pd) and an inner layer made of nickel (Ni).    
     
     
         16 . The lead frame as claimed in  claim 12 , 
 wherein each of said metal layers has a triple-layered structure made of either a combination of an outer layer made of palladium (Pd), an intermediate layer made of nickel (Ni) and an inner layer made of palladium (Pd), or a combination of an outer layer made of gold (Au), an intermediate layer made of nickel (Ni) and an inner layer made of palladium (Pd).    
     
     
         17 . The lead frame claimed in  claim 12 , wherein each of said metal layers has a quadruple-layered structure made of a combination of an outer layer made of palladium (Pd), a first intermediate layer made of nickel (Ni), a second intermediate layer made of palladium (Pd) and an inner layer made of gold (Au).  
     
     
         18 . A lead frame comprising a recessed part, 
 wherein said recessed part is formed at a position corresponding to a position where the resin package is to be formed.    
     
     
         19 . The lead frame as claimed in  claim 17 , further comprising an intermediate metal layer provided inside the recessed part.  
     
     
         20 . The lead frame as claimed in  claim 17 , wherein the recessed part has an area, at least at the periphery, not provided with the intermediate metal layer.  
     
     
         21 . The lead frame as claimed in  claim 17 , wherein the recessed part is provided with raised parts formed therein.  
     
     
         22 . A method of manufacturing a lead frame used for manufacturing a semiconductor device, said method comprising the steps of: 
 a) forming a first resist on a base material;    b) forming a predetermined first resist pattern by removing parts of the first resist corresponding to the parts where through holes are to be formed, said through holes used for fixing or moving the base material;    c) forming through holes by etching the base material using the first resist pattern as a mask;    d) removing the first resist;    e) forming a second resist on the base material;    f) forming a predetermined second resist pattern by forming resist openings by removing parts of the second resist corresponding to the parts where metal layers are to be formed;    g) forming metal layers at the resist openings formed on the second resist; and    h) removing the second resist.    
     
     
         23 . The method of manufacturing a lead frame as claimed in  claim 22 , wherein said step g) is implemented so as to form metal layers each having a single-layered structure and being made of one of gold (Au), palladium (Pd) and aluminum (Al).  
     
     
         24 . The method of manufacturing a lead frame as claimed in  claim 22 , wherein said step g) is implemented so as to form metal layers each having a double-layered structure and having two layers each made of a respective one of gold (Au), palladium (Pd) and aluminum (Al).  
     
     
         25 . The method of manufacturing a lead frame as claimed in  claim 22 , wherein said step g) is implemented so as to form metal layers each having a double-layered structure and having an outer layer made of palladium (Pd) and an inner layer made of nickel (Ni).  
     
     
         26 . The method of manufacturing a lead frame as claimed in  claim 22 , wherein said step g) is implemented so as to form metal layers having a triple-layered structure and having three layers made of either a combination of an outer layer made of palladium (Pd), an intermediate layer made of nickel (Ni) and an inner layer made of palladium (Pd), or a combination of an outer layer made of gold (Au), an intermediate layer made of nickel (Ni) and an inner layer made of palladium (Pd).  
     
     
         27 . The method of manufacturing a lead frame as claimed in  claim 22 , wherein said step g) is implemented so as to form metal layers having a quadruple-layered structure having four layers each made of a combination of an outer layer made of palladium (Pd), a first intermediate layer made of nickel (Ni), a second intermediate layer made of palladium (Pd) and an inner layer made of gold (Au).  
     
     
         28 . A method of manufacturing a semiconductor device using a lead frame, said method comprising the steps of: 
 a) mounting a semiconductor chip on the lead frame, and electrically connecting said semiconductor chip and metal layers provided on the lead frame using connecting members;    b) sealing the semiconductor chip on the lead frame so as to form a resin package;    c) dissolving the lead frame so that the metal layers are provided on a surface of the resin package in an exposed manner;    d) forming stud bumps on a mounting-side surface of exposed metal layers.    
     
     
         29 . A method of manufacturing a semiconductor device, said method comprising the steps of: 
 a) mounting a semiconductor chip on the lead frame, and electrically connecting said semiconductor chip and metal layers provided on the lead frame using connecting members;    b) sealing the semiconductor chip on the lead frame so as to form a resin package;    c) dissolving the lead frame and the metal layers so that mounting-side ends of the connecting members are exposed;    d) forming stud bumps on the exposed mounting-side ends of the connecting members.    
     
     
         30 . A method of manufacturing a semiconductor device, said method comprising the steps of: 
 a) mounting a semiconductor chip on the lead frame, and electrically connecting said semiconductor chip and metal layers provided on the lead frame using connecting members;    b) sealing the semiconductor chip on the lead frame so as to form a resin package;    c) dissolving the lead frame and the metal layers so that mounting-side ends of the connecting members are exposed;    d) forming external plating on the exposed mounting-side ends of the connecting members.    
     
     
         31 . A method of manufacturing the semiconductor device as claimed in  claim 28 , wherein the connecting members are one of wires and protruded electrodes.  
     
     
         32 . A method of manufacturing a semiconductor device using a lead frame, said method comprising the steps of: 
 a) mounting a semiconductor chip in a recessed part formed in the lead frame, and forming connecting members having one set of ends connected to electrode pads on said semiconductor chip and the other set of ends exposed from a resin package so as to form mounting-side ends;    b) sealing the semiconductor chip in the recessed part formed in the lead frame so as to form the resin package;    c) dissolving the lead frame so that the mounting-side ends of the connecting members are exposed;    d) forming stud bumps on the mounting-side ends of the exposed connecting members.    
     
     
         33 . The method of manufacturing a semiconductor device as claimed in  claim 32 , wherein the lead frame further comprises an intermediate metal layer provided inside the recessed part.  
     
     
         34 . The method of manufacturing a semiconductor device as claimed in  claim 32 , wherein the recessed part has an area, at least at the periphery, not provided with the intermediate metal layer.  
     
     
         35 . The method of manufacturing a semiconductor device as claimed in  claim 32 , wherein the recessed part is provided with raised parts formed therein.  
     
     
         36 . The method of manufacturing a semiconductor device as claimed in  claim 32 , wherein the connecting members are one of wires and protruded electrodes.  
     
     
         37 . The method of manufacturing a semiconductor device as claimed in  claim 32 , 
 wherein the connecting members are wires, and    wherein said step a) further comprises the steps of: 
 e) first bonding said wires on the intermediate metal layer, and  
 f) second bonding said wires on the semiconductor chip by extending said wires.  
   
     
     
         38 . A method of manufacturing a semiconductor device using a lead frame, said method comprising the steps of: 
 a) mounting a semiconductor chip in a recessed part formed in the lead frame, and forming connecting members having one set of ends connected to electrode pads on said semiconductor chip and the other set of ends exposed from a resin package so as to form mounting-side ends;    b) sealing the semiconductor chip in the recessed part formed in the lead frame so as to form the resin package;    c) dissolving the lead frame so that the mounting-side ends of the connecting members are exposed;    d) forming external plating on the mounting-side ends of the exposed connecting members.    
     
     
         39 . The method of manufacturing a semiconductor device as claimed in  claim 32 , wherein the lead frame further comprises an intermediate metal layer provided inside the recessed part.  
     
     
         40 . The method of manufacturing a semiconductor device as claimed in  claim 32 , wherein the recessed part has an area, at least at the periphery, not provided with the intermediate metal layer.  
     
     
         41 . The method of manufacturing a semiconductor device as claimed in  claim 32 , wherein the recessed part is provided with raised parts formed therein.  
     
     
         42 . The method of manufacturing a semiconductor device as claimed in  claim 32 , wherein the connecting members are one of wires and protruded electrodes.  
     
     
         43 . The method of manufacturing a semiconductor device as claimed in  claim 32 , 
 wherein the connecting members are wires, and    wherein said step a) further comprises the steps of: 
 e) first bonding said wires on the intermediate metal layer, and  
 f) second bonding said wires on the semiconductor chip by extending said wires.