US2003129794A1PendingUtilityA1

Nitride ready only memory cell with two top oxide layers and the method for manufacturing the same

36
Priority: Jan 4, 2002Filed: Jul 29, 2002Published: Jul 10, 2003
Est. expiryJan 4, 2022(expired)· nominal 20-yr term from priority
Inventors:Chen-Chin Liu
H10B 43/30
36
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Claims

Abstract

A nitride ready only memory cell with two top oxide layers and the method for manufacturing the same are disclosed. By high temperature oxidation (HTO), a more oxide layer is deposited on the floating gate of the ONO structure (Oxide-Nitride-Oxide structure) as a protecting layer so as to prevent the charges trapped in the silicon nitride layer of the ONO floating gate from being discharged between a polysilicon layer and a nitride layer so as to increase the reliability of the memory.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A nitride ready only memory cell with two top oxide layers comprising: 
 a semiconductor substrate;    a plurality of oxide-nitride-oxide structures positioned on a surface of the semiconductor substrate as a floating gate;    a plurality of buried ion diffusion areas installed on the semiconductor substrate between the ONO structures;    a top oxide layer covering the ONO structures and surfaces of the buried ion diffusion areas;    a plurality of buried oxide layers positioned on the buried ion diffusion areas, respectively; and    a plurality of polysilicon word lines positioned above the top oxide layer.    
     
     
         2 . The nitride ready only memory cell as claimed in  claim 1 , wherein the ONO structure is formed with a silicon oxide layer arranged at a lower side, a silicon nitride layer arranged at a middle section, and a silicon oxide layer arranged at an upper side.  
     
     
         3 . The nitride ready only memory cell as claimed in  claim 2 , wherein, the upper silicon oxide layer is nitridized to be as a nitridized silicon oxide layer.  
     
     
         4 . The nitride ready only memory cell as claimed in  claim 1 , wherein the buried ion diffusion area is a N type ion diffusion region.  
     
     
         5 . The nitride ready only memory cell as claimed in  claim 1 , wherein the top oxide layer is formed by deposition with high temperature oxidation (HTO) method.  
     
     
         6 . The nitride ready only memory cell as claimed in  claim 1 , wherein a thickness of the top oxide layer is about 20 ˜100 Å.  
     
     
         7 . A method for manufacturing a nitride ready only memory cell with two top oxide layers comprising the steps of: 
 providing a semiconductor substrate;    forming a plurality of oxide-nitride-oxide structures on a surface of the semiconductor substrate as a floating gate;    forming a plurality of buried ion diffusion areas installed by implanting ions on the semiconductor substrate between the ONO structures;    depositing a top oxide layer covering the ONO structures and surfaces of the buried ion diffusion areas;    forming a plurality of buried oxide layers on the buried ion diffusion areas, respectively; and forming a plurality of polysilicon word lines positioned above the top oxide layer.    
     
     
         8 . The method as claimed in  claim 7 , wherein the ONO structure is formed with a silicon oxide layer arranged at a lower side, a silicon nitride layer arranged at a middle section, and a silicon oxide layer arranged at an upper side.  
     
     
         9 . The method as claimed in  claim 8 , wherein, the upper silicon oxide layer is nitridized to be as a nitridized silicon oxide layer.  
     
     
         10 . The method as claimed in  claim 7 , wherein the buried ion diffusion area is a N type ion diffusion region.  
     
     
         11 . The method as claimed in  claim 7 , wherein the top oxide layer is formed by deposition with high temperature oxidation (HTO) method.  
     
     
         12 . The method as claimed in  claim 7 , wherein a thickness of the top oxide layer is about 20˜100 Å.  
     
     
         13 . A method for manufacturing a nitride ready only memory cell with two top oxide layers comprising the steps of: 
 providing a semiconductor substrate;    forming a plurality of oxide-nitride-oxide structures on a surface of the semiconductor substrate as a floating gate;    forming a plurality of buried ion diffusion areas installed by implanting ions on the semiconductor substrate between the ONO structures;    forming a plurality of buried oxide layers on the buried ion diffusion areas, respectively;    depositing a top oxide layer covering the ONO structures and surfaces of the buried ion diffusion areas; and    forming a plurality of polysilicon word lines positioned above the top oxide layer.    
     
     
         14 . The method as claimed in  claim 13 , wherein the ONO structure is formed with a silicon oxide layer arranged at a lower side, a silicon nitride layer arranged at a middle section, and a silicon oxide layer arranged at an upper side.  
     
     
         15 . The method as claimed in  claim 14 , wherein, the upper silicon oxide layer is nitridized to be as a nitridized silicon oxide layer.  
     
     
         16 . The method as claimed in  claim 13 , wherein the buried ion diffusion area is a N type ion diffusion region.  
     
     
         17 . The method as claimed in  claim 13 , wherein the top oxide layer is formed by deposition with high temperature oxidation (HTO) method.  
     
     
         18 . The method as claimed in  claim 13 , wherein a thickness of the top oxide layer is about 20˜100 Å.

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