Memory-access management method and system for synchronous dynamic random-access memory or the like

Abstract

A memory-access management method and system is provided for use with an DRAM (Dynamic Random-Access Memory) or the like, for the purpose of increasing the performance of memory access to the SDRAM by means of tracking the memory-access history of previous access operations. The memory-page management system has a managing device for managing the N memory pages. According to the embodiment, the managing device further comprises a page register unit. The page register unit is used for storing K storage units, each of which stores an address data of the memory page. The utilization-rate register unit is coupled to the page register circuit, and used for monitoring utilizations of the storage units. In practical design, the number K of the storage units can be designed to be less than the number N of the memory pages.

What is claimed is:  
     
         1 . A memory-page management system for tracking an access history of a memory unit having N memory pages, comprising: 
 a managing device for managing the N memory pages, further comprising: 
 a page register unit for storing K storage units, each of the storage units stores an address data corresponding to one of the memory pages; and  
 a utilization-rate register unit, coupled to the page register unit, for monitoring utilizations of the storage units;  
 wherein the number K is less than the number N.  
   
     
     
         2 . The memory-page management system of  claim 1 , wherein the managing device further comprises a comparison unit, coupled to the page register unit, for receiving an access address and outputting a hit signal according to a compared result of the access address and the address data stored in the page register unit, wherein the hit signal is activated when the access address hits one of the address data stored in the page register unit.  
     
     
         3 . The memory-page management system of  claim 2 , wherein the managing device further comprises a validity-checking unit, coupled to the page register unit, for determining whether the address data stored in the page register unit are valid.  
     
     
         4 . A memory-page management system for tracking an access history of a memory unit, comprising: 
 a memory unit, having N memory pages;    a managing device for managing the N memory pages, further comprising: 
 a page register unit for storing K storage units, each of the storage units stores an address data corresponding to one of the memory pages; and  
 a utilization-rate register unit, coupled to the page register circuit, for monitoring utilizations of the storage units;  
 wherein the number K is less than the number N.  
   
     
     
         5 . The memory-page management system of  claim 4 , wherein the managing device further comprises a comparison unit, coupled to the page register unit, for receiving an access address and outputting a hit signal according to a compared result of the access address and the address data stored in the page register unit, wherein the hit signal is activated when the access address hits one of the address data stored in the page register unit.  
     
     
         6 . The memory-page management system of  claim 5 , wherein the managing device further comprises a validity-checking unit, coupled to the page register unit, for determining whether the address data stored in the page register unit are valid.  
     
     
         7 . A memory-page management system for tracking an access history of a memory unit, comprising: 
 a managing device for managing the N memory pages, further comprising: 
 a page register unit for storing K storage units, each of the storage units stores an address data corresponding to one of the memory pages.  
 wherein the number K is less than the number N.  
   
     
     
         8 . The memory-page management system of  claim 7 , wherein the managing device further comprises a comparison unit, coupled to the page register unit, for receiving an access address and outputting a hit signal according to a compared result of the access address and the address data stored in the page register unit, wherein the hit signal is activated when the access address hits one of the address data stored in the page register unit.  
     
     
         9 . The memory-page management system of  claim 8 , wherein the managing device further comprises a validity-checking unit, coupled to the page register unit, for determining whether the address data stored in the page register unit are valid.  
     
     
         10 . A memory-access management method for tracking access history to a memory unit having N memory pages, which comprises the steps of: 
 (1) providing a page table for storing a predefined number K of recently accessed memory locations to the memory unit, each stored memory location being stored along with a least-recently-used record and a validity bit, with the least-recently-used record indicative of whether the associated memory location is least recently used and the validity bit indicative of whether the associated memory location is valid or invalid, wherein the number K is less than the number N;    (2) in response to an access request, comparing the requested memory location with the memory location data stored in the page table to see if there is a match; 
 if yes, generating a hit signal; whereas 
 if not, replacing the one of the stored memory locations in the page table that is least recently accessed with the memory location of the current access request; and  
 
   (3) checking whether the associated validity bit of the least recently-accessed memory location is set to indicate validity; if yes, generating a restore signal is generated to restore the corresponding memory location to original state.