US2003113947A1PendingUtilityA1
Electrical/optical integration scheme using direct copper bonding
Priority: Dec 19, 2001Filed: Dec 19, 2001Published: Jun 19, 2003
Est. expiryDec 19, 2021(expired)· nominal 20-yr term from priority
H10W 80/312H10W 72/07236H10W 72/941H10W 90/792H10W 80/701H10F 77/50H10F 71/00H10H 29/142H10H 20/857
40
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Claims
Abstract
An electro-optic semiconductor package and fabrication method provides enhanced performance. An integrated circuit (IC) having one or more IC contact pads is provided, where the IC contact pads are connected to an IC on the IC wafer. An intermediate wafer having one or more intermediate contact pads is provided, where the intermediate contact pads are connected to an electro-optic arrangement on the intermediate wafer. The method further provides for direct copper bonding the IC contact pads to adjacent intermediate contact pads such that an electro-optic semiconductor package results.
Claims
exact text as granted — not AI-modifiedIt is claimed that:
1 . A method of fabricating an electro-optic semiconductor package, the method comprising:
providing an integrated circuit (IC) wafer having one or more IC contact pads, the IC contact pads being connected to an IC on the IC wafer; providing an intermediate wafer having one or more intermediate contact pads, the intermediate contact pads being connected to an electro-optic arrangement on the intermediate wafer; and direct copper bonding the IC contact pads to adjacent intermediate contact pads, the electro-optic semiconductor package resulting.
2 . The method of claim 1 further including:
cleaning the contact pads;
disposing the IC contact pads adjacent to the intermediate contact pads in an oxidation-resistant environment having a predetermined ambient temperature; and
forcing the IC contact pads into direct contact with the adjacent intermediate contact pads at a predetermined pressure, a direct copper bond resulting.
3 . The method of claim 2 further including cleaning the contact pads in an acid bath.
4 . The method of claim 2 further including disposing the IC contact pads adjacent to the intermediate contact pads in a nitrogen environment.
5 . The method of claim 1 further including:
disposing a waveguide within the intermediate wafer;
positioning an optical coupler adjacent to the waveguide within the intermediate wafer, the coupler enabling transport of an optical signal and the intermediate contact pads enabling transport of an electrical signal; and
positioning an electro-optic converter between the optical coupler and one or more of the intermediate pads, the converter enabling conversion between the optical signal and the electrical signal.
6 . The method of claim 5 further including positioning an optical detector between the optical coupler and one or more of the intermediate pads, the detector enabling conversion of the optical signal into the electrical signal.
7 . The method of claim 5 further including positioning an optical emitter between the optical coupler and one or more of the intermediate pads, the emitter enabling conversion of the electrical signal into the optical signal.
8 . The method of claim 5 further including extending a via through the intermediate wafer to one or more of the intermediate contact pads.
9 . The method of claim 5 further including:
coupling a release layer to a surface of the intermediate wafer; and
coupling a handle to the release layer.
10 . The method of claim 9 further including removing the release layer after direct copper bonding the IC contact pads to the intermediate contact pads.
11 . The method of claim 10 further includes etching away the release layer.
12 . The method of claim 5 further including enabling conversion between the optical signal and a clock signal.
13 . The method of claim 5 further including enabling conversion between the optical signal and an input/output (I/O) signal.
14 . The method of claim 1 further including providing a computer processor wafer having one or more IC contact pads.
15 . The method of claim 1 further including providing a chip interposer as the intermediate wafer.
16 . The method of claim 1 further including providing a host wafer as the intermediate wafer.
17 . A method of fabricating an intermediate wafer, the method comprising:
disposing a waveguide within the intermediate wafer; positioning an optical coupler adjacent to the waveguide within the intermediate wafer, the coupler enabling transport of an optical signal and one or more intermediate contact pads of the intermediate wafer enabling transport of an electrical signal; and positioning an electro-optic converter between the optical coupler and the intermediate contact pads, the converter enabling conversion between the optical signal and the electrical signal.
18 . The method of claim 17 further including positioning an optical detector between the optical coupler and one or more of the intermediate pads, the detector enabling conversion of the optical signal into the electrical signal.
19 . The method of claim 17 further including positioning an optical emitter between the optical coupler and one or more of the intermediate pads, the emitter enabling conversion of the electrical signal into the optical signal.
20 . The method of claim 17 further including:
coupling a release layer to a surface of the intermediate wafer; and
coupling a handle to the release layer.
21 . The method of claim 20 further including removing the release layer after direct copper bonding one or more IC contact pads to the intermediate contact pads.
22 . The method of claim 21 further including etching away the release layer.
23 . A method of fabricating an electro-optic semiconductor package, the method comprising:
providing a processor wafer having one or more IC contact pads, the IC contact pads being connected to a computer processor on the processor wafer; coupling a release layer to a surface of an intermediate wafer; coupling a handle to the release layer; disposing a waveguide within the intermediate wafer; positioning an optical coupler adjacent to the waveguide within the intermediate wafer, the coupler enabling receipt of an optical signal from the waveguide; positioning optical detector between the optical coupler and one or more intermediate contact pads, the optical detector enabling transfer of an electrical signal to the intermediate contact pads based on the optical signal; cleaning the contact pads in an acid bath; disposing the IC contact pads adjacent to the intermediate contact pads in an oxidation-resistant environment having a predetermined ambient temperature; and forcing the IC contact pads into direct contact with the intermediate contact pads at a predetermined pressure, a direct copper bond resulting.
24 . The method of claim 23 further including removing the release layer after direct copper bonding the IC contact pads to the intermediate contact pads.
25 . The method of claim 24 further including etching away the release layer.
26 . An electro-optic semiconductor package comprising:
an integrated circuit (IC) wafer having one or more IC contact pads, the IC contact pads being connected to an IC on the IC wafer; an intermediate wafer having one or more intermediate contact pads, the intermediate contact pads being connected to an electro-optic arrangement on the intermediate wafer; and said contact pads forming a plurality of direct copper bonds.
27 . The package of claim 26 wherein the electro-optic arrangement of the intermediate wafer includes:
a waveguide disposed within the intermediate wafer;
an optical coupler positioned adjacent to the waveguide within the intermediate wafer, the coupler enabling receipt of an optical signal from the waveguide; and
an optical detector positioned between the optical coupler and one or more of the intermediate contact pads, the optical detector enabling transfer of an electrical signal to the intermediate contact pads based on the optical signal.
28 . The package of claim 27 wherein the intermediate wafer further includes a via extending through the intermediate wafer to one or more of the intermediate contact pads.
29 . The package of claim 26 further including:
a release layer coupled to a surface of the intermediate wafer; and
a handle coupled to the release layer.
30 . The package of claim 29 wherein the handle is removable by etching away the release layer.Join the waitlist — get patent alerts
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