Stereolithographic method for applying materials to electronic component substrates and resulting structures

Abstract

A stereolithographic method of applying material to preformed electronic components and resulting structures. A substrate used for effecting electrical testing of semiconductor dice or a carrier substrate for same may be provided with a protective structure in the form of at least one layer or segment of dielectric material having a controlled thickness or depth. The layer or segment may include precisely sized, shaped and located apertures through which conductive terminals on the surface of the substrate may be accessed. Dielectric material may also be employed as a structure to mechanically align the die with the substrate either in the form of the apertures in the dielectric material layer or segment on the substrate to partially receive the conductive connective elements of the die, an alignment structure comprising upwardly projecting alignment elements adjacent or bracketing an intended die location on the substrate, or both.

What is claimed is:  
     
         1 . A carrier for at least one semiconductor die, comprising: 
 a substrate bearing a plurality of terminals on a surface thereof;    a layer of dielectric material disposed over at least a portion of the substrate surface and defining apertures therethrough aligned with at least some of the plurality of terminals, the layer of dielectric material being of sufficient thickness and the apertures being sized and configured so that portions of conductive connective elements projecting from a surface of at least one semiconductor die in a pattern corresponding to locations of the at least some of the plurality of terminals are receivable therein to effect alignment of the conductive connecting elements with the terminals.    
     
     
         2 . The carrier of  claim 1 , further comprising at least one alignment element projecting from the substrate surface and located proximate at least a portion of a periphery of the at least one semiconductor die located with the projecting conductive connective elements thereof aligned with the terminals.  
     
     
         3 . The carrier of  claim 2 , wherein the at least one alignment element comprises a plurality of alignment elements located proximate opposing peripheral portions of the location of the at least one semiconductor die.  
     
     
         4 . The carrier of  claim 3 , wherein the plurality of alignment elements comprises opposing, facing C-shaped elements bracketing the at least one semiconductor die location.  
     
     
         5 . The carrier of  claim 3 , wherein the plurality of alignment elements comprises four elements, each element being located proximate a comer of the at least one semiconductor die location.  
     
     
         6 . The carrier of  claim 2 , wherein the at least one alignment element comprises an L-shaped alignment element located proximate a corner of the at least one semiconductor die location.  
     
     
         7 . A carrier for at least one semiconductor die, comprising: 
 a substrate bearing a plurality of terminals on a surface thereof; and    at least one alignment element projecting from the substrate surface and located proximate at least a portion of a periphery of at least one semiconductor die location wherein portions of conductive connective elements projecting from a surface of at least one semiconductor die in a pattern corresponding to locations of the plurality of at least some terminals are aligned with the terminals.    
     
     
         8 . The carrier of  claim 7 , wherein the at least one alignment element comprises a plurality of alignment elements located proximate opposing peripheral portions of the location of the at least one semiconductor die location.  
     
     
         9 . The carrier of  claim 8 , wherein the plurality of alignment elements comprises opposing, facing C-shaped elements bracketing the at least one semiconductor die location.  
     
     
         10 . The carrier of  claim 8 , wherein the plurality of alignment elements comprises four elements, each element being located proximate a comer of the at least one semiconductor die location.  
     
     
         11 . The carrier of  claim 7 , wherein the at least one alignment element comprises an L-shaped alignment element located proximate a comer of the at least one semiconductor die location.  
     
     
         12 . A carrier for at least one semiconductor die having a plurality of conductive connective elements projecting from a surface thereof, comprising: 
 a first alignment structure projecting above a surface of a carrier substrate and located adjacent a periphery of an intended location for the at least one semiconductor die; and    a second alignment structure comprising a pattern of apertures corresponding to a pattern of the conductive connective elements of the plurality and located within the periphery of the intended die location.    
     
     
         13 . A multi-chip module, comprising: 
 a plurality of semiconductor dice, each having conductive connective elements projecting from a surface thereof;    a substrate bearing alignment structures associated with terminals on the substrate and adapted to receive at least some of the projecting conductive connective elements of each semiconductor die of the plurality.    
     
     
         14 . The multi-chip module of  claim 13 , further comprising alignment structures located proximate peripheries of locations of each semiconductor die of the plurality.  
     
     
         15 . A die assembly, comprising: 
 at least one semiconductor die having conductive connective elements projecting from a surface thereof;    a substrate bearing alignment structures associated with terminals on the substrate and adapted to receive at least some of the projecting conductive connective elements.    
     
     
         16 . The die assembly of  claim 15 , further comprising at least one alignment structure located proximate a periphery of a location of the at least one semiconductor die.