Semiconductor integrated circuit device

Abstract

A semiconductor integrated circuit device has two semiconductor integrated circuit chips ( 20 and 30 ) respectively provided with a plurality of PADs ( 40 a - 40 e , 41 a - 41 e and 42 a - 42 d ), a plurality of LEADs ( 50 a - 50 d ) disposed around arrays of the semiconductor integrated circuit chips, and a plurality of bonding wires ( 60 a - 60 e and 61 a - 61 d ). The plurality of bonding wires are connected so as not to straddle one semiconductor integrated circuit chip ( 30 ) and allow wiring between the PADs ( 40 a - 40 e ) of the other semiconductor integrated circuit chip ( 20 ) and the LEADs ( 50 a - 50 d ).

What is claimed is:  
     
         1 . A semiconductor integrated circuit device, comprising: 
 at least two semiconductor integrated circuit chips respectively provided with a plurality of PADs;    a plurality of LEADs disposed around arrays of said semiconductor integrated circuit chips; and    a plurality of bonding wires;    wherein said plurality of bonding wires are connected so as not to straddle one semiconductor integrated circuit chip and allow wiring between said PADs of the other integrated circuit chip and said LEADs.    
     
     
         2 . The semiconductor integrated circuit device according to  claim 1 , wherein the one semiconductor integrated circuit chip includes I/F functions between the other semiconductor integrated circuit chip and LEADs.  
     
     
         3 . The semiconductor integrated circuit device according to  claim 1 , further including a third semiconductor integrated circuit chip provided with a plurality of PADs, and 
 wherein said third semiconductor integrated circuit chip includes I/F functions between the other semiconductor integrated circuit chip and the one semiconductor integrated circuit chip, and I/F functions between the one semiconductor integrated circuit chip and LEADs.    
     
     
         4 . The semiconductor integrated circuit device according to  claim 1 , further including, 
 a third semiconductor integrated circuit chip disposed under the one semiconductor integrated circuit chip; and    a height adjusting semiconductor integrated circuit chip provided with a plurality of PADs, which is disposed on said third semiconductor integrated circuit chip, adjacent to the one semiconductor integrated circuit chip, and    wherein said height adjusting semiconductor integrated circuit chip has I/F functions between the other semiconductor integrated circuit chip and LEADs, and    the plurality of PADs of said height adjusting semiconductor integrated circuit chip are disposed on the same plane as the plurality of PADs of the other semiconductor integrated circuit chip.    
     
     
         5 . The semiconductor integrated circuit device according to  claim 1 , further including an I/F semiconductor integrated circuit chip provided with a plurality of PADs, which is disposed under the one semiconductor integrated circuit chip, and 
 wherein said I/F semiconductor integrated circuit chip has I/F functions between the other semiconductor integrated circuit chip and LEADs.    
     
     
         6 . The semiconductor integrated circuit device according to  claim 1 , including LEADs which extend under the one semiconductor integrated circuit chip and reach their corresponding positions adjacent to the other semiconductor integrated circuit chip.  
     
     
         7 . A semiconductor integrated circuit device, comprising: 
 a semiconductor integrated circuit chip provided with a plurality of PADs;    a plurality of LEADs disposed around said semiconductor integrated circuit chip; and    two bonding wires for connecting one LEAD of said plurality of LEADs to the two PADs of said plurality of PADs.    
     
     
         8 . The semiconductor integrated circuit device according to  claim 7 , wherein said semiconductor integrated circuit chip includes PADs for measuring a current flowing between two PADs connected to one LEAD by two bonding wires to thereby effect a connection test on the two bonding wires.  
     
     
         9 . A semiconductor integrated circuit device, comprising: 
 a semiconductor integrated circuit chip provided with a plurality of PADs;    a plurality of LEADs disposed around said semiconductor integrated circuit chip; and    a bonding wire for connecting between power supplies lying within said semiconductor integrated circuit chip.    
     
     
         10 . A semiconductor integrated circuit device, comprising: 
 a semiconductor integrated circuit chip provided with a plurality of PADs;    one or a plurality of LEADs disposed around an array of said semiconductor integrated circuit chip; and    a plurality of bonding wires;    wherein at least one LEAD of said plurality of LEADs is connected to two or more PADs of the plurality of PADs by the corresponding bonding wires of said plurality of bonding wires.    
     
     
         11 . The semiconductor integrated circuit device according to  claim 10 , wherein a LEAD connected to two or more PADs includes portions extending along the periphery of the array of said semiconductor integrated circuit chip.  
     
     
         12 . The semiconductor integrated circuit device according to  claim 10 , wherein a LEAD connected to two or more PADs includes portions extending along the periphery of the array of said semiconductor integrated circuit chip and is connected to LEADs different from the LEAD connected to the two or more PADs by bonding wires.  
     
     
         13 . The semiconductor integrated circuit device according to  claim 10 , wherein a LEAD connected to two or more PADs includes portions extending along the periphery of the array of said semiconductor integrated circuit chip.  
     
     
         14 . A semiconductor integrated circuit device, comprising: 
 a semiconductor integrated circuit chip provided with a plurality of PADs; and    a plurality of temperature sensors for measuring a temperature distribution within said semiconductor integrated circuit chip.    
     
     
         15 . The semiconductor integrated circuit device according to  claim 14 , wherein said plurality of temperature sensors are disposed within said semiconductor integrated circuit chip as plural arrays in which the arrays comprising the plurality of temperature sensors connected in series are parallel-connected to one another.  
     
     
         16 . The semiconductor integrated circuit device according to  claim 15 , wherein said semiconductor integrated circuit chip further includes, 
 a switch for selecting the arrays comprising the temperature sensors, and    a selector for selecting the temperature sensors of the respective arrays.