US2003090921A1PendingUtilityA1

Content addressable memory match line sensing techniques

Priority: Nov 15, 2001Filed: Nov 15, 2001Published: May 15, 2003
Est. expiryNov 15, 2021(expired)· nominal 20-yr term from priority
G11C 15/04
34
PatentIndex Score
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Claims

Abstract

A content addressable memory ( 10 ) comprising a group of content addressable cells ( 20 ) and a group of corresponding match switches ( 30 ) coupled by a first match line ( 36 ) that is switched to a first voltage in the event all of the match switches in the group are in a first state and is switched to a second range of voltages in the event one or more of the match switches in the group are in a second state. Apparatus for detecting the state of the first match line comprises a second line ( 56 ), a second transistor ( 58 ) coupled to the second line and arranged to place a third voltage on the second line that is different from the first voltage and the second range of voltages and a differential amplifier ( 70 ) arranged to detect the difference in voltage between the first match line and the second line.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . In a content addressable memory comprising a group of content addressable cells and a group of corresponding match switches coupled by a first match line, each match switch being switchable to a first state in the event of a match between data stored in a corresponding cell and test data and being switchable to a second state in the event of a mismatch between data in the corresponding cell and the test data, the first match line being switched to a first voltage in the event all of the match switches in the group are in the first state and being switched to a second range of voltages in the event one or more of the match switches in the group are in the second state, apparatus for detecting the state of the first match line comprising: 
 a second line;    a second switch outside the group of corresponding match switches coupled to the second line and arranged to place a third voltage on the second line, the third voltage being different from the first voltage and the second range of voltages; and    a differential amplifier coupled to the first match line and the second line arranged to detect the difference in voltage between the first match line and the second line.    
     
     
         2 . The apparatus of  claim 1  wherein the match switches in the group comprise a predetermined first size range and wherein the second switch comprises a second predetermined size less than the first predetermined size range.  
     
     
         3 . The apparatus of  claim 2  wherein the match switches in the group comprise substantially the same size so that the first size range comprises a first predetermined size and wherein the second predetermined size is substantially one half the first predetermined size.  
     
     
         4 . The apparatus of  claim 1  wherein the match switches comprise transistors.  
     
     
         5 . The apparatus of  claim 4  wherein the second switch comprises a transistor.  
     
     
         6 . The apparatus of  claim 1  wherein the third voltage lies between the first voltage and the second range of voltages.  
     
     
         7 . The apparatus of  claim 1  and further comprising a sense amplifier coupled to the differential amplifier.  
     
     
         8 . The apparatus of  claim 1  and further comprising: 
 a second group of content addressable cells and a second group of corresponding match switches coupled by a third match line, each match switch in the second group being switchable to a first state in the event of a match between data stored in a corresponding cell and test data and being switchable to a second state in the event of a mismatch between data in the corresponding cell and the test data, the third match line being switched to the first voltage in the event all of the match switches in the second group are in the first state and being switched to the second range of voltages in the event one or more of the match switches in the second group are in the second state; and  
 a second differential amplifier coupled to the third match line and the second line arranged to detect the difference in voltage between the third match line and the second line.  
 
     
     
         9 . The apparatus of  claim 1  wherein the second line has the same loading as the first match line.  
     
     
         10 . The apparatus of  claim 1  wherein the second line is subject to the same environment as the first match line.  
     
     
         11 . In a content addressable memory comprising a group of content addressable cells and a group of corresponding match switches coupled by a first match line, each match switch being switchable to a first state in the event of a match between data stored in a corresponding cell and test data and being switchable to a second state in the event of a mismatch between data in the corresponding cell and the test data, the first match line being switched to a first voltage in the event all of the match switches in the group are in the first state and being switched to a second range of voltages in the event one or more of the match switches in the group are in the second state, a method of detecting the state of the first match line comprising: 
 placing a second line in the environment of the first match line;    placing a third voltage on the second line, the third voltage being different from the first voltage and the second range of voltages; and    detecting the difference in voltage between the first match line and the second line.    
     
     
         12 . The method of  claim 11  wherein the third voltage lies between the first voltage and the second range of voltages.  
     
     
         13 . The method of  claim 11  wherein the content addressable memory further comprises a second group of content addressable cells and a second group of corresponding match switches coupled by a third match line, each match switch in the second group being switchable to a first state in the event of a match between data stored in a corresponding cell and test data and being switchable to a second state in the event of a mismatch between data in the corresponding cell and the test data, the third match line being switched to the first voltage in the event all of the match switches in the second group are in the first state and being switched to the second range of voltages in the event one or more of the match switches in the second group are in the second state and wherein the method further comprises detecting the difference in voltage between the third match line and the second line.  
     
     
         14 . The method of  claim 11  and further comprising loading the second line substantially the same as the first match line.  
     
     
         15 . The method of  claim 11  and further comprising subjecting the second line to substantially the same environment as the first match line.

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