Semiconductor wafer processing apparatus

Abstract

A semiconductor wafer processing apparatus grinds a surface of a semiconductor wafer by mechanical grinding, and then removes a damaged layer in the ground surface. In the processing apparatus, a grinding portion, a precenter portion, a wafer cleaning portion, plasma treatment portions, and magazines are arranged radially about an origin of a polar coordinate system of a third wafer transport portion having a robot mechanism, and their positions of arrangement are set such that the origin is located on lines of extension of wafer carry-in and carry-out center lines of the plasma treatment portions. Thus, the number of changed grippings of the semiconductor wafer can be minimized to prevent breakage of the semiconductor wafer. Moreover, transfer of the semiconductor wafer between the respective portions can be covered by the single robot mechanism, and the equipment can be made compact.

What we claim is:  
     
         1 . A semiconductor wafer processing apparatus for grinding a surface of a semiconductor wafer to thin the semiconductor wafer, comprising: 
 a grinding portion for mechanically grinding the semiconductor wafer;    a wafer cleaning portion for cleaning the semiconductor wafer after mechanical grinding;    a damaged layer removal treatment portion for removing a damaged layer, caused to the semiconductor wafer by mechanical grinding, after cleaning by the wafer cleaning portion; and    a wafer transport mechanism for transferring the semiconductor wafer between the grinding portion, the wafer cleaning portion, and the damaged layer removal treatment portion.    
     
     
         2 . The semiconductor wafer processing apparatus of  claim 1 , including a precenter portion for centering the semiconductor wafer, and wherein the semiconductor wafer, which has been centered by the precenter portion, is supplied to the grinding portion by the wafer transport mechanism.  
     
     
         3 . The semiconductor wafer processing apparatus of  claim 1 , including an stocker for accommodating the semiconductor wafer before processing which is to be supplied to the grinding portion and/or the semiconductor wafer after processing which has been withdrawn from the damaged layer removal treatment portion.  
     
     
         4 . The semiconductor wafer processing apparatus of  claim 1 , wherein the wafer transport mechanism includes a robot mechanism on a polar coordinate system.  
     
     
         5 . The semiconductor wafer processing apparatus of  claim 1 , wherein the wafer transport mechanism includes a before-cleaning transport portion for withdrawing the semiconductor wafer after mechanical grinding from the grinding portion, and passing the semiconductor wafer on to the wafer cleaning portion, and an after-cleaning transport portion for withdrawing the semiconductor wafer after cleaning from the wafer cleaning portion, and passing the semiconductor wafer on to the damaged layer removal treatment portion.  
     
     
         6 . The semiconductor wafer processing apparatus of  claim 1 , wherein the damaged layer removal treatment portion is a plasma treatment portion for etching the damaged layer by plasma treatment.  
     
     
         7 . The semiconductor wafer processing apparatus of  claim 1 , wherein the damaged layer removal treatment portion is a wet etching treatment portion for etching the damaged layer with a chemical liquid.  
     
     
         8 . The semiconductor wafer processing apparatus of  claim 1 , wherein 
 the wafer transport mechanism comprises a first wafer transport portion for holding the semiconductor wafer from the precenter portion and bringing the semiconductor wafer onto the grinding portion, a second wafer transport portion for withdrawing the semiconductor wafer ground by the grinding portion and transporting the semiconductor wafer to the wafer cleaning portion, and a third wafer transport portion having a robot mechanism on a polar coordinate system for transferring the semiconductor wafer between the precenter portion, the wafer cleaning portion, and the damaged layer removal treatment portion, and    the damaged layer removal treatment portion is disposed in a third quadrant and a fourth quadrant of an orthogonal coordinate system in which an origin of the polar coordinate system of the robot mechanism is a common origin and a direction of the grinding portion is a Y-axis positive direction, and such that the origin of the polar coordinate system is positioned on a line of extension of a semiconductor wafer carry-in and carry-out center line of the damaged layer removal treatment portion.    
     
     
         9 . The semiconductor wafer processing apparatus of  claim 8 , wherein the stocker for accommodating the semiconductor wafer before processing which is to be supplied to the grinding portion and/or the semiconductor wafer after processing which has been withdrawn from the damaged layer removal treatment portion is provided at a position at which the wafer can be brought in and brought out by the third wafer transport portion.  
     
     
         10 . The semiconductor wafer processing apparatus of  claim 8 , wherein the cleaning portion is disposed in one of the first quadrant and the second quadrant of the orthogonal coordinate system.  
     
     
         11 . The semiconductor wafer processing apparatus of  claim 10 , wherein the precenter portion is disposed in a quadrant of the coordinate system on a side opposite to the cleaning portion, with the Y-axis of the coordinate system being interposed between the presenter portion and the cleaning portion.  
     
     
         12 . A semiconductor wafer processing method for thinning a semiconductor wafer to a target thickness, including the steps of: 
 mechanically grinding a side of the semiconductor wafer opposite to a surface thereof, where a circuit has been formed, by a grinding portion;    withdrawing the semiconductor wafer after mechanical grinding from the grinding portion, and passing the semiconductor wafer on to the wafer cleaning portion;    cleaning the semiconductor wafer passed on to the wafer cleaning portion;    withdrawing the semiconductor wafer after cleaning from the wafer cleaning portion, and passing the semiconductor wafer on to a damaged layer removal treatment portion; and    removing a damaged layer, caused by the mechanical grinding, in the damaged layer removal treatment portion.    
     
     
         13 . The semiconductor wafer processing method of  claim 12 , wherein the damaged layer removal treatment portion is a plasma treatment portion for etching the damaged layer by plasma treatment.  
     
     
         14 . The semiconductor wafer processing method of  claim 13 , further comprising grinding the semiconductor wafer by mechanical grinding to a thickness being a sum of the target thickness and a dry etching margin set in a range of 3 μm to 50 μm, and removing a remainder of the semiconductor wafer by dry etching using plasma treatment.  
     
     
         15 . The semiconductor wafer processing method of  claim 14 , wherein the semiconductor wafer consists essentially of silicon.  
     
     
         16 . The semiconductor wafer processing method of  claim 13 , wherein after the semiconductor wafer is ground by the mechanical grinding, the semiconductor wafer is cleaned with a liquid before dry etching is performed.  
     
     
         17 . The semiconductor wafer processing method of  claim 16 , wherein the liquid is water.  
     
     
         18 . The semiconductor wafer processing method of  claim 12 , wherein the damaged layer removal treatment portion is a wet etching treatment portion for etching the damage layer with a chemical liquid.  
     
     
         19 . The semiconductor wafer processing method of  claim 12 , wherein mechanical grinding and removal of the damaged layer are performed, with a protective film being formed on the surface of the semiconductor wafer where the circuit has been formed.