US2003080417A1PendingUtilityA1

Semiconductor device, semiconductor package, electronic device, and method for establishing information processing environment

Assignee: SONY COMPUTER ENTERTAINMENT INCPriority: Oct 2, 2001Filed: Oct 2, 2002Published: May 1, 2003
Est. expiryOct 2, 2021(expired)· nominal 20-yr term from priority
Inventors:Masaaki Oka
H10W 90/20H10W 20/49H10W 90/00H05K 2201/09709H05K 2201/09409H05K 2201/10159H05K 1/181H05K 2201/10689H05K 2201/09418Y02P70/50
40
PatentIndex Score
0
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Claims

Abstract

An electronic device is provided on which semiconductor packages can be mounted efficiently. The electronic device includes a board that can receive a plurality of first semiconductor packages each carrying a processor device and a plurality of second semiconductor packages each carrying a memory device. Mount regions where the packages are to be mounted and non-mount regions are alternately arranged in rows and columns on the board. This ensures approximately equal wiring distances between the packages, allowing processor devices to access associated memory devices at the same time.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device, comprising: 
 a plurality of function implementation segments provided in the semiconductor device, said function implementation segments being adapted to implement their unique and distinctive functions;    each of said function implementation segments being electrically interconnected to other of said function implementation segments so that each of said function implementation segments can implement a desired function in cooperation with said other of said function implementation segments to which it is electrically interconnected,    each of said function implementation segments being positioned in the semiconductor device so that each of said function implementation segments is spaced from adjacent function implementation segments by a wiring distance, said wiring distance between each adjacent pair of function implementation segments being about the same.    
     
     
         2 . A semiconductor package, comprising: 
 a plurality of mount regions provided in the semiconductor package, each of said mount regions being electrically interconnected to other of said mount regions;    a semiconductor device mounted on each of at least two of said mount regions, each of said semiconductor devices being electrically interconnected to other of said semiconductor devices so that each of said semiconductor devices can implement a desired function in cooperation with said other of said semiconductor devices to which it is electrically interconnected;    each of said mount regions being positioned in the semiconductor package so that each of said semiconductor devices is spaced from adjacent semiconductor devices by a wiring distance, said wiring distance between each adjacent pair of semiconductor devices being about the same.    
     
     
         3 . An electronic device, comprising: 
 a plurality of mount regions provided in the electronic device, each of said mount regions being electrically interconnected to other of said mount regions;    a semiconductor package mounted on each of at least two of said mount regions, each of said semiconductor packages being electrically interconnected to other of said semiconductor packages so that each of said semiconductor packages can implement a desired function in cooperation with said other of said semiconductor packages to which it is electrically interconnected;    each of said mount regions being positioned in the electronic device so that each of said semiconductor packages is spaced from adjacent semiconductor packages by a wiring distance, said wiring distance between each adjacent pair of semiconductor packages being about the same.    
     
     
         4 . The electronic device as claimed in  claim 3 , further comprising: 
 a board; and    at least one non-mount region on which no semiconductor package is mounted;    said mount regions and said non-mount regions having rectangular shapes of equal size and being alternately arranged in rows and columns on said board to form a matrix pattern.    
     
     
         5 . The electronic device as claimed in  claim 3 , further comprising: 
 a board, wherein said mount regions have a rectangular shape and a size, said size of each of said mount regions being the same, said mount regions being arranged in rows and columns on said board with almost no gap between adjacent ones of said mount regions.    
     
     
         6 . The electronic device as claimed in  claim 3 , further comprising: 
 a board, wherein said mount regions have a regular hexagonal shape and a size, said size of each of said mount regions being the same, said mount regions being arranged in a honeycomb pattern on said board.    
     
     
         7 . The electronic device as claimed in  claim 3 , further comprising: 
 a board, wherein said mount regions have a triangular shape and a size, said size of each of said mount regions being the same, said mount regions being arranged on said board with almost no gap between adjacent ones of said mount regions.    
     
     
         8 . The electronic device as claimed in  claim 3 , further comprising: 
 a board, wherein each of said plurality of mount regions is a combination of at least two triangular regions of equal size, said combinations being arranged on said board with almost no gap between adjacent ones of said mount regions.    
     
     
         9 . The electronic device as claimed in  claim 3 , further comprising: 
 a board, wherein said plurality of mount regions include a first group of mount regions having a first shape and a second group of mount regions having a second shape different from said first shape, each of said mount regions being arranged on said board so that a side of a mount region of said first group is opposed to a side of a mount region of said second group and with almost no gap between said side of said mount region of said first group and said side of said mount region of said second group.    
     
     
         10 . The electronic device as claimed in  claim 3 , wherein each of said mount regions has a shape, and each of said semiconductor packages has a mounting surface having a shape, said shape of each of said mounting surfaces being the same as said shape of said mount region on which said semiconductor package is mounted.  
     
     
         11 . The electronic device as claimed in  claim 10 , wherein each of said semiconductor packages includes a semiconductor device, for each of said semiconductor packages, said semiconductor device in said semiconductor package mounted on one of said mount regions being different from said semiconductor device in said semiconductor package mounted on another of said mount regions adjacent to said one of said mount regions.  
     
     
         12 . The electronic device as claimed in  claim 11 , wherein said one of said mount regions includes an active device package having an active device, and said another of said mount regions includes a passive device package having a passive device.  
     
     
         13 . The electronic device as claimed in  claim 12 , further comprising: 
 a plurality of active device packages, each of said active device packages including an active device, each of said active device packages being mounted on a mount region adjacent to said another of said mount regions, said passive device being shared among said active devices.    
     
     
         14 . The electronic device as claimed in  claim 12 , further comprising: 
 a plurality of passive device packages, each of said passive device packages including a passive device, each of said passive device packages being mounted on a mount region adjacent to said one of said mount regions, said active device communicating with each of said passive devices.    
     
     
         15 . The electronic device as claimed in  claim 14 , further comprising: 
 a plurality of active device packages, each of said active device packages including an active device, each of said active device packages being mounted on a mount region adjacent to a mount region having one of said passive device packages, at least one of said passive devices being shared among at least a portion of said active devices, said active devices being configured so that each of said active devices in said portion of said active devices is able to read through said at least one passive device digital information generated by other of said active devices in said portion of said active devices.    
     
     
         16 . The electronic device as claimed in  claim 12 , wherein said active device is a processor device capable of reading digital information, and said passive device is a memory device for storing said digital information.  
     
     
         17 . A method for establishing an information processing environment in an electronic device, the electronic device including a board and a plurality of mount regions provided on the board, each of the mount regions being electrically interconnected to other of the mount regions, and a semiconductor package mounted on each of at least two of the mount regions, each of the semiconductor packages being electrically interconnected to other of the semiconductor packages so that each of the semiconductor packages can implement a desired function in cooperation with the other of the semiconductor packages to which it is electrically interconnected, said method comprising: 
 positioning the mount regions so that each of the semiconductor packages is spaced from adjacent semiconductor packages by a wiring distance, the wiring distance between each adjacent pair of semiconductor packages being about the same;    mounting a first semiconductor package having a first processor device on a selected mount region;    mounting a second semiconductor package having a memory device on another mount region adjacent to the selected mount region;    mounting a third semiconductor package having a second processor device on a mount region adjacent to the another mount region; and    allowing the first processor device to read results of information processing carried out by the second processor device and the second processor device to read results of information processing carried out by the first processor device through the memory device.

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