Compound semiconductor device and method for manufacturing the same
Abstract
The invention provides a method for manufacturing a gallium nitride-based III-V group compound semiconductor device, which comprises the following steps: forming a semiconductor stacked structure over a substrate, wherein the semiconductor stacked structure comprises an n-type semiconductor layer, an active layer, and a p-type semiconductor layer; etching the semiconductor stacked structure to expose a part of the n-type semiconductor layer; forming a first electrode on the n-type semiconductor layer, wherein the first electrode comprises an ohmic contact layer, a barrier layer, and a pad layer; performing an annealing process to lower the contact resistance between the first electrode and the n-type semiconductor layer and activate the p-type semiconductor layer at the same time; and forming a second electrode on the p-type semiconductor layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A gallium nitride-based III-V group compound semiconductor device, comprising:
an n-type gallium nitride-based III-V group compound semiconductor layer; and an electrode on said n-type gallium nitride-based III-V group compound semiconductor layer, and said electrode having an ohmic contact layer, a barrier layer over said ohmic contact layer, and a pad layer over said barrier layer.
2 . The device as in claim 1 , wherein said barrier layer comprises platinum, tungsten, or nickel.
3 . The device as in claim 1 , wherein said electrode is composed of titanium/aluminum/platinum/gold.
4 . A gallium nitride-based III-V group compound semiconductor device, comprising:
a substrate having a first and a second major surfaces; a semiconductor stacked structure formed over the first major surface of said substrate, and said semiconductor stacked structure having an n-type gallium nitride-based III-V group compound semiconductor layer, an active layer, and a p-type gallium nitride-based III-V group compound semiconductor layer; a first electrode on the n-type semiconductor layer, and said first electrode having an ohmic contact layer, a barrier layer over said ohmic contact layer, and a pad layer over said barrier layer; and a second electrode on the p-type semiconductor layer.
5 . The device as in claim 4 , wherein said barrier layer comprises platinum, tungsten, or nickel.
6 . The device as in claim 4 , wherein said electrode is composed of titanium/aluminum/platinum/gold.Join the waitlist — get patent alerts
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