Data transfer in host expansion bridge
Abstract
Data is converted from a first granularity to a second granularity different from the first granularity. The ratio “n” of the second granularity of the data to the first granularity of the data is determined as a power of 2. The least significant n bits of the beginning alignment of the data are added to the least significant n bits of the beginning count of the data, and the carry bit of the sum is designated as “c”. A logical “OR” is performed of the bits of the resulting sum to obtain a value designated as “d”. A number of data units, equal to the sum of “c” and “d”, is added to the data.
Claims
exact text as granted — not AI-modified1 . A method of converting data from a first granularity to a second granularity different than the first granularity, said method comprising:
determining the ratio “n” of the second granularity of the data to the first granularity of the data as a power of 2; adding the least significant n bits of the beginning alignment of the data and the least significant n bits of the beginning count of the data, the carry bit of the sum being designated as “c”; performing a logical “OR” of the bits of the resulting sum to obtain a value designated as “d”; and adding a number of data units to the data, said number of data units being equal to the sum of “c” and “d”.
2 . The method recited in claim 1 , wherein the method converts the granularity of data received from a network serial link.
3 . The method recited in claim 2 , wherein the data of the first granularity is a byte.
4 . The method recited in claim 3 , wherein the data of a second granularity is provided to a host interface of a processing system.
5 . A computer program stored in a tangible medium, said program, when executed, carrying out a method of converting data from a first granularity to a second granularity different than the first granularity, said method comprising:
determining the ratio “n” of the second granularity of the data to the first granularity of the data as a power of 2; adding the least significant n bits of the beginning alignment of the data and the least significant n bits of the beginning count of the data, the carry bit of the sum being designated as “c”; performing a logical “OR” of the bits of the resulting sum to obtain a value designated as “d”; and adding a number of data units to the data, said number of data units being equal to the sum of “c” and “d”.
6 . The computer program recited in claim 5 , wherein the method converts the granularity of data received from a network serial link.
7 . The method recited in claim 6 , wherein the first granularity is a byte.
8 . The method recited in claim 7 , wherein the data of a second granularity is provided to a host interface of a processing system.
9 . A virtual interface expansion bridge, said virtual interface expansion bridge comprising:
a first-in-first-out (FIFO) buffer receiving and storing data from a serial link of a network; and a byte steering logic circuit converting the alignment of said data stored in said FIFO buffer so that said data is provided to a host interface and naturally aligned with said host interface.
10 . A virtual interface expansion bridge according to claim 9 , wherein the byte steering logic circuit receives control information and payload data.
11 . A virtual interface expansion bridge according to claim 10 , wherein the control information includes length of payload data, destination address and alignment of the data.
12 . A virtual interface expansion bridge according to claim 11 , wherein the control information is used to steer payload data through the byte steering logic circuit.
13 . A virtual interface expansion bridge according to claim 10 , wherein the byte steering logic circuit includes control logic which outputs a shift signal based on the byte length and alignment data to put the first valid byte in a naturally aligned location.
14 . A virtual interface expansion bridge according to claim 13 , wherein data in one line of said FIFO buffer is latched and held to be merged with data in a subsequent line of said FIFO buffer.
15 . A virtual interface expansion bridge according to claim 14 , wherein the control logic selectively outputs a signal to increment a pointer of said FIFO buffer.
16 . A virtual interface expansion bridge according to claim 9 , further comprising a plurality of ports receiving data from a corresponding plurality of NGIO or Infiniband serial links.
17 . A virtual interface expansion bridge according to claim 16 , further comprising a virtual interface architecture to establish communication with said plurality of NGIO or Infiniband serial links.Join the waitlist — get patent alerts
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