Microwave semiconductor variable attenuation circuit
Abstract
A circuit for the variable attenuation of microwave signals including at least a first coupler and a first series circuit of inductors. Each inductor has a defined inductance, and one end of the first series circuit is connected to a first terminal of the first coupler. Also included is a second series circuit of inductors, each inductor having a defined inductance, where one end of the second series circuit is connected to a second terminal of the first coupler. A plurality of controllable resistance mechanisms, each being connected to a junction point between two respective inductors of the first or second series circuit are also included. The other end of the first series circuit is grounded through a first termination resistor and the other end of the second series circuit is grounded through a second termination resistor.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A circuit for the variable attenuation of microwave signals comprising:
(a) at least a first coupler, (b) a first series circuit of inductors, each inductor having a defined inductance, where one end of said first series circuit is connected to a first terminal of said first coupler, (c) a second series circuit of inductors, each inductor having a defined inductance, where one end of said second series circuit is connected to a second terminal of said first coupler, and (d) a plurality of means having controllable resistance, each of said means respectively being connected to a junction point between two respective inductors of said first or second series circuit.
2 . A circuit according to claim 1 , characterized in that a second coupler is provided, where the other end of said first series circuit is connected to a first terminal of said second coupler, and the other end of said second series circuit is connected to a second terminal of said second coupler.
3 . A circuit according to claim 2 , characterized in that inductors at the ends of said first and second series circuits have a predetermined inductance represented as L, the remaining inductors have an inductance 2L, and said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
4 . A circuit according to claims 2 , characterized in that each series circuit contains two inductors of equal inductance represented as L.
5 . A circuit according to claim 4 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
6 . A circuit according to claim 2 , characterized in that said second coupler has an impedance equal to the impedance of said first coupler.
7 . A circuit according to claim 6 , characterized in that, said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
8 . A circuit according to claims 6 , characterized in that each series circuit contains two inductors of equal inductance represented as L.
9 . A circuit according to claim 8 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
10 . A circuit according to claim 2 , wherein said means having controllable resistance is a field-effect-transistor.
11 . A circuit according to claim 10 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
12 . A circuit according to claims 10 , characterized in that each series circuit contains two inductors of equal inductance represented as L.
13 . A circuit according to claim 12 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
14 . A circuit according to claim 2 , characterized in that the means having controllable resistance is a diode.
15 . A circuit according to claim 14 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
16 . A circuit according to claims 14 , characterized in that, each series circuit contains two inductors of equal inductance represented as L.
17 . A circuit according to claim 16 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
18 . A circuit according to claim 1 , characterized in that the other end of said first series circuit is grounded through a first termination resistor, and the other end of said second series circuit is grounded through a second termination resistor.
19 . A circuit according to claim 18 , characterized in that inductors at the ends of said first and second series circuits have a predetermined inductance represented as L, the remaining inductors have an inductance 2L, and said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
20 . A circuit according to claims 18 , characterized in that each series circuit contains two inductors of equal inductance represented as L.
21 . A circuit according to claim 20 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
22 . A circuit according to claim 18 , wherein said means having controllable resistance is a field-effect-transistor.
23 . A circuit according to claim 22 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
24 . A circuit according to claims 22 , characterized in that each series circuit contains two inductors of equal inductance represented as L.
25 . A circuit according to claim 24 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
26 . A circuit according to claim 18 , characterized in that the means having controllable resistance is a diode.
27 . A circuit according to claim 26 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
28 . A circuit according to claims 26 , characterized in that each series circuit contains two inductors of equal inductance represented as L.
29 . A circuit according to claim 28 , characterized in that said first and second series circuits satisfy Z 0 2 =2L/C, where the characteristic impedance of said first coupler is represented as Z 0 , and the capacity of said means having controllable resistance is represented as C.
30 . A circuit according to claim 1 , characterized by being a Monolithic-Microwave-Integrated-Circuit structure on a semiconductor board.
31 . A circuit according to claim 30 , characterized in that the circuit is of symmetrical structure with respect to said first series circuit and said second series circuit.
32 . A circuit according to claim 31 , characterized by common through holes for grounding pairs of said means having controllable resistance, each pair consisting of one means connected to a junction between two inductors of said first series circuit and one means connected to a junction between two inductors of said second series circuit.
33 . A circuit according to claim 1 , characterized in that every junction point between two inductors in said first or second series circuit is connected to a means having controllable resistance, and all of the means having controllable resistance are controlled on the basis of a common signal is provided at a single terminal.Join the waitlist — get patent alerts
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