Mechanism for efficient wearout counters in destructive readout memory

Abstract

A memory device having a wear out counter. The memory device comprises at least one block of memory, that block having a metadata section associated with it. A number of bits in the metadata section are used to store the current state of a wear out counter. As the block is accessed, the counter is incremented, allowing a memory controller to level usage and to rectify any problems associated with wear out of that block. A method for incrementing the counter is also included.

What is claimed is:  
     
         1 . A memory device having a destructive read process, comprising: 
 a) at least one block of memory cells;    b) a metadata block associated with each of the blocks of memory cell;    c) a counter within each metadata block, wherein the counter is operable to track usage of the block of memory cells associated with the metadata block.    
     
     
         2 . The memory device of  claim 1 , wherein the memory device further comprises a polymer ferroelectric memory device.  
     
     
         3 . The memory device of  claim 1 , wherein the memory device is used as a disk replacement.  
     
     
         4 . The memory device of  claim 1 , wherein the memory device is used as a nonvolatile cache memory.  
     
     
         5 . The memory device of  claim 1 , wherein the metadata block further comprises flags set and reset during cache operations.  
     
     
         6 . A method of tracking usage of a destructive read memory device, the method comprising: 
 a) participating an a memory access cycle;    b) incrementing a counter producing an incremented counter, wherein the counter is contained in metadata for a block participating in the memory access cycle;    c) updating a preexisting error correction code producing an updated error correction code, wherein the error correction code includes new data from the memory access cycle and the incremented counter; and    d) determining if the counter exceeds a predetermined threshold.    
     
     
         7 . The method of  claim 6 , wherein the memory access cycle further comprises: 
 a) reading a sector of memory; and    b) correcting data from the sector of memory as necessary using the preexisting error correction code producing corrected data.    
     
     
         8 . The method of  claim 7 , wherein the method further comprises writing the corrected data, the incremented counter and the updated error correction code to the memory block.  
     
     
         9 . The method of  claim 6 , wherein the memory access cycle further comprises erasing a sector and reading the counter.  
     
     
         10 . The method of  claim 9 , wherein the method further comprises writing new data, the incremented counter, and the updated error correction code to the memory sector previously erased.  
     
     
         11 . The method of  claim 6 , wherein incrementing a wear out counter further comprises: 
 a) generating a random number;    b) comparing the random number to a scaling threshold;    c) incrementing the wear out counter, if the random number is less than the scaling threshold;    d) writing the wear out counter to a metadata block of a memory.    
     
     
         12 . The method of  claim 6 , wherein incrementing a wear out counter further comprises: 
 a) incrementing a second counter for each memory access cycle;    b) determining if the second counter has reached a value substantially equal to a number of bits for the wear out counter divided by a usage threshold; and    c) incrementing the wear out counter if the second counter has reached the value.    
     
     
         13 . A method of updating a counter, the method comprising: 
 a) generating a random number;    b) comparing the random number to a scaling threshold;    c) incrementing the counter, if the random number has a predetermined relationship to the scaling threshold;    d) writing the incremented counter to a metadata block of a memory.    
     
     
         14 . The method of  claim 13 , wherein the scaling threshold is substantially equal to a number of bits for a counter divided by a usage threshold.  
     
     
         15 . The method of  claim 14 , wherein the number of bits for a counter is four.  
     
     
         16 . The method of  claim 13 , wherein the predetermined relationship further comprises the random number being less than the scaling threshold.  
     
     
         17 . A method comprising: 
 a) comparing a random number to a first predetermined threshold according to a criterion; and    b) if the random number meets the criterion, incrementing a counter.    
     
     
         18 . The method of  claim 20  further comprising storing the incremented counter.  
     
     
         19 . The method of  claim 20  further comprising: 
 a) comparing the stored counter to a second predetermined threshold; and  
 b) if the stored counter exceeds the second predetermined threshold, taking an action as though the stored counter exceeds the second predetermined counter multiplied by the first predicted threshold.  
 
     
     
         20 . The method of  claim 19 , wherein the counter is used in a destructive read memory.  
     
     
         21 . The method of  claim 19 , wherein the counter is used in a polymer ferroelectric memory.