Semiconductor memory device and method of fabricating the same

Abstract

A semiconductor memory device is provided, which prevents electrical short-circuit between the conductor lines (e.g., the bit lines) and the contact pads for electrically connecting the lower capacitor electrodes. The first conductive pads are formed to fill the respective contact holes of the first interlayer dielectric film in such a way that the tops of the first pads are lower than the surface of the first interlayer dielectric film. Thus, the gaps are formed on the tops of the first pads in the respective contact holes. The wiring (or conductive) lines, the top faces and side faces of which are covered with the dielectric, are formed on the surface of the first interlayer dielectric film. The wiring lines of the first group are electrically connected to the first conductive pads. The wiring lines of the second group are apart from the respective first conductive pads, thereby electrically insulating the wiring lines of the second group from the first conductive pads.

What is claimed is:  
     
         1 . A semiconductor memory device comprising: 
 (a) a semiconductor substrate;    (b) a first interlayer dielectric film formed directly on or indirectly over the substrate through at least one film; the first interlayer dielectric film having a surface and contact holes;    (c) first conductive pads formed to fill the respective contact holes of the first interlayer dielectric film; tops of the first pads being lower than the surface of the first interlayer dielectric film, forming gaps on the tops of the first pads in the respective contact holes of the first interlayer dielectric film; the gaps being divided into a first group and a second group;    (d) conductor lines formed on the surface of the first interlayer dielectric film; a top face and side faces of each of the conductor lines being covered with a dielectric; the conductor lines being divided into a first group and a second group; the conductor lines of the first group being electrically connected to the respective first conductive pads of the first group; the condcutor lines of the second group being electrically insulated from the respective first conductive pads of the second group;    (e) a second interlayer dielectric film formed on the surface of the first interlayer dielectric film to cover the conductor lines; the second interlayer dielectric film having contact holes; and    (f) approximately cylindrical lower capacitor electrodes formed in the respective contact holes of the second interlayer dielectric film; the lower capacitor electrodes being contacted with the first interlayer dielectric film.    
     
     
         2 . The device according to  claim 1 , further comprising 
 second conductive pads formed to fill the respective gaps of the first group; and    dielectric pads formed to fill the respective gaps of the second group.    
     
     
         3 . The device according to  claim 2 , wherein the dielectric pads are made of a same material as the second interlayer dielectric film.  
     
     
         4 . The device according to  claim 2 , wherein the second conductive pads are made of a different material from the first conductive pads, thereby providing a sufficient etch selectivity between the materials of the second conductive pads and the first conductive pads.  
     
     
         5 . The device according to  claim 1 , further comprising dielectric sidewalls formed in the respective gaps of the first interlayer dielectric film in such a way as to inner walls of the respective contact holes of the first interlayer dielectric film.  
     
     
         6 . The device according to  claim 5 , further comprising 
 second conductive pads formed to fill the respective gaps of the first group; and    dielectric pads formed to fill the respective gaps of the second group.    
     
     
         7 . The device according to  claim 6 , wherein the dielectric pads are made of a same material as the second interlayer dielectric film.  
     
     
         8 . The device according to  claim 6 , wherein the second conductive pads are made of a different material from the first conductive pads, thereby providing a sufficient etch selectivity between the materials of the second conductive pads and the first conductive pads.  
     
     
         9 . The device according to  claim 2 , wherein the first conductive pads are made of polysilicon and the second conductive pads are made of a silicide film of one selected from the group consisting of titanium, cobalt, nickel, tantalum, and zirconium.  
     
     
         10 . The device according to  claim 5 , wherein the dielectric sidewalls are made of oxide of silicon.  
     
     
         11 . The device according to  claim 2 , wherein: 
 the first conductive pads are made of polysilicon and the second conductive pads are made of a silicide film of one selected from the group consisting of titanium, cobalt, nickel, tantalum, and zirconium; and    the dielectric sidewalls are made of oxide of silicon.    
     
     
         12 . The device according to  claim 2 , wherein: 
 the first conductive pads are made of polysilicon, the first interlayer dielectric film is made of BPSG, and the second conductive pads are made of a silicide film of one selected from the group consisting of titanium, cobalt, nickel, tantalum, and zirconium;    the dielectric sidewalls are made of oxide of silicon; and    the dielectric covering the top face and side faces of the conductor lines is nitride of silicon.    
     
     
         13 . The device according to  claim 1 , wherein the conductor lines are formed by a combination of a polysilicon subfilm and a silicide subfilm stacked with each other.  
     
     
         14 . The device according to  claim 1 , wherein the conductor lines are formed by a metal subfilm and a non-metal subfilm.  
     
     
         15 . The device according to  claim 1 , wherein the conductor lines are formed by a combination of a polysilicon subfilm and a silicide subfilm stacked with each other.  
     
     
         16 . A method of fabricating a semiconductor memory device, comprising the steps of: 
 (a) forming a first interlayer dielectric film directly on or indirectly over a semiconductor substrate through at least one film, the first interlayer dielectric film having a surface and contact holes;    (b) forming first conductive pads to fill the respective contact holes of the first interlayer dielectric film; tops of the first conductive pads being lower than the surface of the first interlayer dielectric film so as to form gaps on the tops of the first pads in the respective contact holes the gaps being divided into a first group and a second group;    (c) forming conductive lines on the surface of the first interlayer dielectric film, a top face and side faces of each of the conductive lines being covered with a dielectric, the conductive lines being divided into a first group and a second group, the conductive lines of the first group being electrically connected to the respective first conductive pads of the first group, the conductive lines of the second group being electrically insulated from the respective first conductive pads of the second group;    (d) forming a second interlayer dielectric film on the surface of the first interlayer dielectric film to cover the conductive lines:    (e) selectively etching the second interlayer dielectric film to form contact holes therein;    (f) forming approximately cylindrical lower capacitor electrodes in the respective contact holes of the second interlayer dielectric film, the lower capacitor electrodes being in contact with the dielectric covering the conductive lines; and    (g) forming dielectric sidewalls in the respective gaps of the first interlayer dielectric film in such a way as to form inner walls of the respective contact holes of the first interlayer dielectric film.    
     
     
         17 . The method according to  claim 16 , further comprising the steps of: 
 forming second conductive pads to fill the respective gaps of the first group; and    forming dielectric pads to fill the respective gaps of the second group.    
     
     
         18 . The method according to  claim 17 , wherein the dielectric pads are made of a same material as the second interlayer dielectric film.  
     
     
         19 . The method according to  claim 17 , wherein the second conductive pads are made of a different material form the first conductive pads, thereby providing a sufficient etch selectively between the materials of the second conductive pads and the first conductive pads.  
     
     
         20 . The method according to  claim 16  wherein the dielectric side walls are made of oxide of silicon.