Integrated circuit configuration having at least one buried circuit element and an insulating layer

Abstract

The integrated circuit configuration has at least one buried circuit element and an insulating layer. A multiplicity of insulating regions are in contact with one another to forming a locally delimited insulating layer in the substrate. In this way, trench capacitors implemented as buried circuit elements can be manufactured with a structure size of less than 100 nm in a simple and cost-effective manner.

We claim:  
     
         1 . An integrated circuit configuration, comprising: 
 a substrate having a surface;    at least one circuit element formed in said substrate near said surface;    at least one buried circuit element formed in said substrate and spaced apart from said circuit element near said surface; and    an insulating layer locally delimited in said substrate and disposed between said circuit element near said surface and said buried circuit element.    
     
     
         2 . The integrated circuit configuration according to  claim 1 , wherein said buried circuit element is a capacitor.  
     
     
         3 . The integrated circuit configuration according to  claim 1 , wherein said insulating layer is a thermal oxide.  
     
     
         4 . The integrated circuit configuration according to  claim 1 , wherein said substrate is a monocrystalline semiconductor substrate.