Selective writing of data elements from packed data based upon a mask using predication

Abstract

A method and apparatus for selectively writing data elements from packed data based upon a mask using predication. In one embodiment of the invention, for each data element of a packed data operand, the following is performed in response to a plurality of instructions: determining a predicate value for the data element from one or more bits of a corresponding packed data mask element indicating whether the data element is selected for writing to a corresponding storage location, and storing in the corresponding storage location the data element based on the predicate value.

What is claimed is:  
     
         1 . A computer-implemented method for selectively writing each data element from a packed data operand into a corresponding storage location comprising: 
 in response to a plurality of instructions, performing the following for each data element of said packed data operand, 
 determining a predicate value for said data element from one or more bits of a corresponding packed data mask element indicating whether said data element is selected for writing to said corresponding storage location; and  
 storing in said corresponding storage location the selected data element based on said predicate value.  
   
     
     
         2 . The method of  claim 1 , wherein the following is also performed for each data element of said packed data operand: 
 shifting said packed data operand by one data element.    
     
     
         3 . The method of  claim 1 , wherein said predicate value is determined by using a test bit instruction.  
     
     
         4 . The method of  claim 1 , wherein the acts are performed in response to a single macroinstruction from which said plurality of instructions have been produced.  
     
     
         5 . The method of  claim 4 , wherein said macroinstruction is part of a first instruction set separate and different from a second instruction set including said plurality of instructions, wherein instructions from said second instruction set can be received directly by said processor.  
     
     
         6 . The method of  claim 1 , wherein said plurality of instructions are microinstructions.  
     
     
         7 . The method of  claim 1 , wherein said plurality of instructions are macroinstructions.  
     
     
         8 . The method of  claim 1  preliminarily comprising: 
 translating a single instruction into said plurality of instructions.