Mask for forming polysilicon and a method for fabricating thin film transistor using the same

Abstract

A mask for crystallization of amorphous silicon to polysilicon is provided. The mask includes a plurality of slit patterns for defining regions to be illuminated. The plurality of slit patterns are formed along a longitudinal first direction and the mask moves along a longitudinal second direction. The first longitudinal direction is substantially perpendicular to the second longitudinal direction. Each of the split patterns is deviated apart by substantially a same distance from another. Thus, the polysilicon using the mask are grown to be isotropic with respect to the horizontal and vertical directions.

What is claimed is:  
     
         1 . A mask for crystallization of amorphous silicon into polysilicon, the mask comprising a plurality of slit patterns for defining regions to be illuminated, wherein the plurality of slit patterns are formed along a longitudinal first direction and the mask moves along a longitudinal second direction, the first longitudinal direction being substantially perpendicular to the second longitudinal direction.  
     
     
         2 . The mask of  claim 1 , wherein each of the plurality of slit patterns is spaced apart by substantially a same distance from another.  
     
     
         3 . The mask of  claim 2 , wherein the mask comprises a first region and a second region, the first region comprises a first part of the plurality of slit patterns and the second region comprises a second part of the plurality of slit patterns, the first part of the plurality of slit patterns is deviated from the second part of the plurality of slit patterns by one pitch, where the one pitch is a distance between the plurality of slit patterns.  
     
     
         4 . The mask of  claim 1 , wherein the mask comprises a plurality of separate regions, each of the plurality of separate regions comprises at least a portion of the plurality of slit patterns.  
     
     
         5 . A mask for crystallization of amorphous silicon into polysilicon, the mask comprising a plurality of slit patterns for defining transmission regions to be illuminated, wherein the plurality of slit patterns are arranged in first and second directions at two or more regions in the mask such that the polysilicon are grown in two or more directions.  
     
     
         6 . The mask of  claim 5 , wherein the first direction is substantially perpendicular to the second direction.  
     
     
         7 . The mask of  claim 5 , wherein the plurality of slit patterns are spaced apart with substantially the same distance.  
     
     
         8 . The mask of  claim 7 , wherein the mask comprises a first region and a second region, the first region comprises a first part of the plurality of slit patterns and the second region comprises a second part of the plurality of slit patterns, the first part of the plurality of slit patterns is perpendicular to the second part of the plurality of slit patterns.  
     
     
         9 . The mask of  claim 8 , wherein each of the first region and the second region has at least two portions.  
     
     
         10 . The mask of  claim 9 , wherein the two portions of the first region comprise the first part of the plurality of slit patterns deviated each other by one pitch, where the one pitch is a distance between the slit patterns.  
     
     
         11 . The mask of  claim 9 , wherein the two portions of the second region comprise the second part of the plurality of slit patterns deviated each other by one pitch, where the one pitch is a distance between the slit patterns.  
     
     
         12 . A method of fabricating a thin film transistor, the method comprising the steps of: 
 forming an amorphous silicon on an insulating substrate; and    crystallizing the amorphous silicon through a sequential lateral crystallization process for forming a polysilicon layer.    
     
     
         13 . The method of  claim 12 , wherein the sequential lateral crystallization process is performed using a mask, the mask comprises a plurality of slit patterns for defining transmission regions to be illuminated, the plurality of slit patterns are substantially perpendicular to a mask moving direction.  
     
     
         14 . The method of  claim 12 , wherein the sequential lateral crystallization process is performed using a mask, the mask comprises a plurality of slit patterns for defining transmission regions to be illuminated, wherein the plurality of slit patterns are arranged in first and second directions in the mask such that the polysilicon are grown in two or more directions, and the first direction is substantially perpendicular to the second direction.  
     
     
         15 . The method of  claim 12 , further comprising the steps of: 
 forming a gate insulating layer on the polysilicon layer;    forming a gate electrode on the gate insulating layer over the polysilicon layer;    implanting impurities into the polysilicon layer for forming a source region and a drain region;    forming an inter-layered insulating layer such that the inter-layered insulating layer covers the gate electrode;    sequentially etching the inter-layered insulating layer and the gate insulating layer for forming contact holes exposing the source and the drain regions, respectively; and    forming source and drain electrodes connected to the source and the drain regions through the contact holes, respectively.    
     
     
         16 . The method of  claim 15 , wherein the gate insulating layer is formed of silicon oxide or silicon nitride.  
     
     
         17 . The method of  claim 15 , wherein the source and the drain regions are doped with n-type or p-type impurities.  
     
     
         18 . The method of  claim 15 , further comprising the step of forming a pixel electrode connected to the drain electrode.  
     
     
         19 . The method of  claim 18 , wherein the pixel electrode is formed with transparent conductive material or reflective conductive material.  
     
     
         20 . The method of  claim 19 , wherein the transparent conductive material comprises ITO (indium tin oxide) or IZO (indium zinc oxide).