Variable-frequency pulse generator

Abstract

The output (θ 2 ) of a digital adder ( 13 ) before being held by a first data holding circuit ( 14 ), a first reference value (D 1 ) and a second reference value (D 2 ) are compared, respectively, by a first data comparator ( 15 ) and a second data comparator ( 16 ), to thereby change one cycle of the output control of the pulse train fout from four cycles (T 1 -T 4 ) to two cycles (T 1 -T 2 ) of the reference clock. Further, by comparing the output (θ 1 ) of the first data holding circuit ( 14 ) and the first reference value (D 1 ) by a third data comparator ( 19 ), the latch timing of the overflow signal is changed from T 4 to T 1.

1 . A variable-frequency pulse generator which executes one cycle of output control of the pulse train by two cycles of a reference clock, comprising: 
 an inversion unit which inverts a first reference value regulated by the reference clock;    a selection unit which selects the first reference value after inversion, when an overflow has occurred, and in any other event selects a predetermined value which changes depending on a set speed;    a data holding unit which latches an output of a previous stage, being the present value of a result of addition, in the second cycle of the reference clock and at a predetermined timing of an overflow prevention signal;    an addition unit which adds the value selected by the selection unit and the data latched by the data holding unit;    a first comparison unit which compares the value obtained by the addition unit as a result of addition and the first reference value;    a second comparison unit which compares the value obtained by the addition unit as a result of addition and a second reference value which is half of the first reference value;    a judgment unit which judges whether a condition “0<addition result≦second reference value” is satisfied, or whether a condition “second reference value≦addition result<first reference value” is satisfied, or whether a condition “first reference value≦addition result” is satisfied, and outputs a specified signal corresponding to a result of the judgment;    a pulse train output unit which latches the specified signal at a predetermined timing of the second cycle of the reference clock, and outputs a pulse train of a desired frequency;    a third comparison unit which compares the data latched by the data holding unit and the first reference value, and when a condition “latched data>first reference value” is satisfied, judges that the overflow has occurred; and    an overflow prevention unit which outputs the overflow prevention signal at a predetermined timing of the first cycle of the reference clock, when the third comparison unit has judged that the overflow has occurred.    
     
     
         2 . A variable-frequency pulse generator which executes one cycle of output control of the pulse train by two cycles of a reference clock, comprising: 
 an addition unit which adds a predetermined value, which changes depending on a set speed, and data latched at a predetermined timing of the second cycle of the reference clock;    a subtraction unit which subtracts a first reference value regulated by the reference clock from the value obtained by the addition unit as a result of addition;    a first comparison unit which compares the value obtained by the addition unit as a result of addition and the first reference value, and when a condition “addition result≧first reference value” is satisfied, judges that an overflow has occurred;    a second comparison unit which compares the value obtained by the addition unit as a result of addition and a second reference value which is half of the first reference value;    a selection unit which selects the value obtained by the subtraction unit as a result of subtraction when the overflow has occurred, and in any other event selects the value obtained by the addition unit as a result of addition;    a data holding unit which latches the value selected by the selection unit at a predetermined timing of the second cycle of the reference clock;    a judgment unit which judges based on each the results of comparisons in the first comparison unit and the second comparison unit, whether a condition “0≦addition result<second reference value” is satisfied, or whether a condition “second reference value≦addition result≦first reference value” is satisfied, or whether a condition “first reference value≦addition result” is satisfied, and outputs a specified signal according to a result of the judgment; and    a pulse train output unit which latches the specified signal at a predetermined timing of the second cycle of the reference clock, and outputs a pulse train of a desired frequency.    
     
     
         3 . A variable-frequency pulse generator which executes one cycle of output control of the pulse train by two cycles of a reference clock, comprising: 
 an inversion unit which inverts a reference value regulated by the reference clock;    a selection unit which selects the reference value after inversion, when an overflow has occurred, and in any other event selects a predetermined value which changes depending on a set speed;    a data holding unit which latches an output of a previous stage, being the present value of a result of addition, in the second cycle of the reference clock and at a predetermined timing of an overflow prevention signal;    an addition unit which adds the value selected by the selection unit and the data latched by the data holding unit;    a first comparison unit which compares the value obtained by the addition unit as a result of addition and the reference value;    a judgment unit which judges whether a condition “the overflow frequency is an even number” and “0≦addition result<reference value” is satisfied, or whether a condition “the overflow frequency is an even number” and “reference value≦addition result” is satisfied, or whether conditions “the overflow frequency is an odd number” and “0<addition result≦reference value” are satisfied, or whether conditions “the overflow frequency is an odd number” and “reference value≦addition result” are satisfied, and outputs a specified signal corresponding to a result of the judgment;    a pulse train output unit which latches the specified signal at a predetermined timing of the second cycle of the reference clock, and outputs a pulse train of a desired frequency;    a second comparison unit which compares the data latched by the data holding unit and the reference value, and when a condition “latched data≧reference value” is satisfied, judges that the overflow has occurred; and    an overflow prevention unit which outputs the overflow prevention signal at a predetermined timing of the first cycle of the reference clock, when the second comparison unit has judged that the overflow has occurred.    
     
     
         4 . A variable-frequency pulse generator which executes one cycle of output control of the pulse train by two cycles of a reference clock, comprising: 
 an inversion unit which inverts a first reference value regulated by the reference clock;    a selection unit which selects the first reference value after inversion, when an overflow has occurred, and in any other event selects a predetermined value which changes depending on a set speed;    a data holding unit which latches an output of a previous stage, being the present value of a result of addition, in the second cycle of the reference clock and at a predetermined timing of the overflow prevention signal;    an addition unit which adds the value selected by the selection unit and the data latched by the data holding unit;    a first comparison unit which compares the value obtained by the addition unit as a result of addition and the first reference value;    a second comparison unit which compares the value obtained by the addition unit as a result of addition and a second reference value which is half of the first reference value;    a judgment unit which judges whether a condition “0≦addition result<second reference value” is satisfied, or whether a condition “second reference value≦addition result<first reference value” is satisfied, or whether a condition “first reference value≦addition result<(second reference value×3)” is satisfied, or whether a condition “(second reference value×3)≦addition result” is satisfied, and outputs a specified signal corresponding to a result of the judgment;    a pulse train output unit which latches the specified signal at a predetermined timing of the second cycle of the reference clock, and outputs a pulse train of a desired frequency;    a third comparison unit which compares the data latched by the data holding unit and the first reference value, and when a condition “latched data>first reference value” is satisfied, judges that the overflow has occurred; and    an overflow prevention unit which outputs the overflow prevention signal at a predetermined timing of the first cycle of the reference clock, when the third comparison unit has judged that the overflow has occurred.