Under bump metallization pad and solder bump connections

Abstract

The present invention relates to an improved method of forming and structure for under bump metallurgy (“UBM”) pads for a flip chip which reduces the number of metal layers and requires the use of only a single passivation layer to form, thus eliminating a masking step required in typical prior art processes. The method also includes repatterning bond pad locations.

What is claimed as new and desired to be protected by Letters Patent of the United States is:  
     
         1 . A method of forming a solder connection on a bond pad of a semiconductor substrate comprising: 
 providing a first metal layer overlying said bond pad of said semiconductor substrate;    providing a second metal layer overlying said first metal layer;    forming a solder bump on said second metal layer; and    reflowing said solder bump, wherein said second metal layer is consumed by said solder bump during said reflow.    
     
     
         2 . The method according to  claim 1 , wherein said first metal layer is formed of a first sub-layer and a second sub-layer overlying said first sub-layer.  
     
     
         3 . The method according to  claim 2 , wherein said first sub-layer is formed of titanium.  
     
     
         4 . The method according to  claim 3 , wherein said titanium layer is between approximately 500 and 3000 Å thick.  
     
     
         5 . The method according to  claim 2 , wherein said second sub-layer is formed of nickel.  
     
     
         6 . The method according to  claim 5 , wherein said nickel layer is between approximately 500 and 5000 Å thick.  
     
     
         7 . The method according to  claim 1 , wherein said second metal layer is formed of gold.  
     
     
         8 . The method according to  claim 1 , wherein said second metal layer is formed of silver.  
     
     
         9 . The method according to  claim 1 , wherein said second metal layer is formed of palladium.  
     
     
         10 . The method according to  claim 1 , wherein said first metal layer is formed of a composition of nickel and titanium.  
     
     
         11 . The method according to  claim 1 , wherein said first metal layer is applied by chemical vapor deposition.  
     
     
         12 . The method according to  claim 1 , wherein said first metal layer is applied by physical vapor deposition.  
     
     
         13 . The method according to  claim 1 , wherein said forming step further comprises: 
 utilizing a wire bonder to form said solder bump.    
     
     
         14 . The method according to  claim 1 , wherein said solder bump is formed of a low alpha emission solder.  
     
     
         15 . The method according to  claim 14 , wherein said alpha emission is less than 0.001 hits/cm 2 /hr.  
     
     
         16 . The method according to  claim 1 , wherein said solder bump is formed by lead free solders.  
     
     
         17 . The method according to  claim 15 , wherein said lead free solders are Sn/In and SnSb.  
     
     
         18 . The method according to  claim 15 , wherein said lead free solders are alloys of Sn/In and SnSb.  
     
     
         19 . The method according to  claim 1 , further comprising: 
 repatterning said bond pad of said semiconductor substrate before providing said first metal layer.    
     
     
         20 . A method of forming a solder connection on a copper bond pad of a semiconductor substrate comprising: 
 providing a first metal layer overlying said copper bond pad of said semiconductor substrate;    forming a solder bump on said first metal layer; and    reflowing said solder bump, wherein said first metal layer is consumed by said solder bump during said reflow.    
     
     
         21 . The method according to  claim 20 , wherein said first metal layer is formed of gold.  
     
     
         22 . The method according to  claim 20 , wherein said first metal layer is formed of silver.  
     
     
         23 . The method according to  claim 20 , wherein said first metal layer is formed of palladium.  
     
     
         24 . The method according to  claim 20 , wherein said forming step further comprises: 
 utilizing a wire bonder to form said solder bump.    
     
     
         25 . The method according to  claim 20 , wherein said solder bump is formed of a low alpha emission solder.  
     
     
         26 . The method according to  claim 25 , wherein said alpha emission is less than 0.001 hits/cm 2 /hr.  
     
     
         27 . The method according to  claim 20 , wherein said solder bump is formed by lead free solders.  
     
     
         28 . The method according to  claim 27 , wherein said lead free solders are Sn/In and SnSb.  
     
     
         29 . The method according to  claim 27 , wherein said lead free solders are alloys of Sn/In and SnSb.  
     
     
         30 . The method according to  claim 20 , further comprising: 
 repatterning said copper bond pad of said semiconductor substrate before providing said first metal layer.    
     
     
         31 . A solder connection for a bond pad of a semiconductor substrate comprising: 
 a plated first metal layer overlying said bond pad of said semiconductor substrate; and    a reflowed solder bump formed on said plated first metal layer which has consumed a second metal layer provided over said first metal layer.    
     
     
         32 . The solder connection according to  claim 31 , wherein said plated metal layer is nickel.  
     
     
         33 . The solder connection according to  claim 31 , wherein said second metal layer is gold.  
     
     
         34 . The solder connection according to  claim 31 , said solder bump is formed by a wire bonder.  
     
     
         35 . The solder connection according to  claim 31 , wherein said solder bump is formed of a low alpha emission solder.  
     
     
         36 . The solder connection according to  claim 31 , wherein said alpha emission is less than 0.001 hits/cm 2 /hr.  
     
     
         37 . The solder connection according to  claim 31 , wherein said solder bump is formed by lead free solders.  
     
     
         38 . The solder connection according to  claim 37 , wherein said lead free solders are Sn/In and SnSb.  
     
     
         39 . The solder connection according to  claim 37 , wherein said lead free solders are alloys of Sn/In and SnSb.  
     
     
         40 . A solder connection for a bond pad of a semiconductor substrate comprising: 
 a first metal layer overlying said bond pad of said semiconductor substrate; and    a reflowed solder bump formed on said first metal layer which has consumed a second metal layer which was provided over said first metal layer.    
     
     
         41 . The solder connection according to  claim 40 , wherein said first metal layer is formed of a first sub-layer and a second sub-layer overlying said first sub-layer.  
     
     
         42 . The solder connection according to  claim 41 , wherein said first-sub-layer is formed of titanium.  
     
     
         43 . The solder connection according to  claim 42 , wherein said titanium layer is between approximately 500 and 3000 Å thick.  
     
     
         44 . The solder connection according to  claim 41 , wherein said second sub-layer is formed of nickel.  
     
     
         45 . The solder connection according to  claim 44 , wherein said nickel layer is between approximately 500 and 5000 Å thick.  
     
     
         46 . The solder connection according to  claim 40 , wherein said second metal layer is between approximately 50 and 1000 Å thick.  
     
     
         47 . The solder connection according to  claim 46 , wherein said second metal layer is formed of gold.  
     
     
         48 . The solder connection according to  claim 46 , wherein said second metal layer is formed of silver.  
     
     
         49 . The solder connection according to  claim 46 , wherein said second metal layer is formed of palladium.  
     
     
         50 . The solder connection according to  claim 40 , wherein said first metal layer is formed of a composition of nickel and titanium.  
     
     
         51 . The solder connection according to  claim 40 , said solder bump is formed by a wire bonder.  
     
     
         52 . The solder connection according to  claim 40 , wherein said solder bump is formed of a low alpha emission solder.  
     
     
         53 . The solder connection according to  claim 52 , wherein said alpha emission is less than 0.001 hits/cm 2 /hr.  
     
     
         54 . The solder connection to  claim 40 , wherein said solder bump is formed by lead free solders.  
     
     
         55 . The solder connection according to  claim 54 , wherein said lead free solders are Sn/In and SnSb.  
     
     
         56 . The solder connection according to  claim 54 , wherein said lead free solders are alloys of Sn/In and SnSb.  
     
     
         57 . A solder connection on a copper bond pad of a semiconductor substrate comprising: 
 a reflowed solder bump on said first metal layer which has consumed a first metal layer which was overlying said copper bond pad.    
     
     
         58 . The solder connection according to  claim 57 , wherein said first metal layer is between approximately 50 and 1000 Å thick.  
     
     
         59 . The solder connection according to  claim 57 , wherein said first metal layer is formed of gold.  
     
     
         60 . The solder connection according to  claim 57 , wherein said first metal layer is formed of silver.  
     
     
         61 . The solder connection according to  claim 57 , wherein said first metal layer is formed of palladium.  
     
     
         62 . The solder connection according to  claim 57 , wherein said solder bump is formed of a low alpha emission solder.  
     
     
         63 . The solder connection according to  claim 62 , wherein said alpha emission is less than 0.001 hits/cm 2 /hr.  
     
     
         64 . The solder connection according to  claim 57 , said solder bump is formed by a wire bonder.  
     
     
         65 . The solder connection according to  claim 57 , wherein said solder bump is formed by lead free solders.  
     
     
         66 . The solder connection according to  claim 65 , wherein said lead free solders are Sn/In and SnSb.  
     
     
         67 . The solder connection according to  claim 65 , wherein said lead free solders are alloys of Sn/In and SnSb.  
     
     
         68 . The method according to  claim 1  wherein said first and second metal layers are provided in a via of an insulating layer and wherein when said second metal layer is provided it is at a level which is below the level of a top surface of said insulating layer.  
     
     
         69 . The method according to  claim 1  wherein said first and second metal layers are provided in a via of an insulating layer and wherein when said second metal layer is provided it is at a level which is equal to the level of a top surface of said insulating layer.  
     
     
         70 . The method according to  claim 1  wherein said first and second metal layers are provided in a via of an insulating layer and wherein when said second metal layer is provided it is at a level which is higher than the level of a top surface of said insulating layer.