Cache apparatus and cache method
Abstract
In order to enable a plurality of access origins to effectively utilize a cache thereby to realize high-speed and stable processing, by measuring a frequency of access from the plurality of access origins, allocating a cache capacity based on the access frequency, and notifying an error, when it occurs, to an access origin having the allocation or to a predetermined access origin to process the error, there is provided a cache apparatus for enabling a plurality of access origins to make access to a cache memory. The cache apparatus comprises a unit for setting a cache capacity into which each access origin can charge data; a unit for charging data into an area within the set cache capacity in response to a request from each access origin based on the cache capacity; and a unit for reading data from the cache memory and notifying the data without depending on the set cache capacity when each access origin has made a reference request. There is also provided a cache method that is executed by using the cache apparatus or the like.
Claims
exact text as granted — not AI-modified1 . A cache apparatus for enabling a plurality of access origins to make access to a cache memory, the cache apparatus comprising:
a unit for setting a cache capacity into which each access origin can charge data; a unit for charging data into an area within the set cache capacity in response to a request from each access origin based on the cache capacity; and a unit for reading data from the cache memory and notifying the data without depending on the set cache capacity when each access origin has made a reference request.
2 . The cache apparatus according to claim 1 , further comprising a unit for automatically adjusting the cache capacity into which data can be charged.
3 . The cache apparatus according to claim 1 , further comprising a unit for measuring a frequency that each of the plurality of access origins makes access to the cache memory, wherein the frequency of making access to the cache memory is a frequency of making reference to the cache memory.
4 . The cache apparatus according to claim 1 , further comprising a unit for notifying an error to an access origin allocated with an accessed area when the error occurred during an access made to the cache memory, or notifying the error to a predetermined access origin when there is no access origin having an allocation.
5 . The cache apparatus according to claim 2 , further comprising a unit for notifying an error to an access origin allocated with an accessed area when the error occurred during an access made to the cache memory, or notifying the error to a predetermined access origin when there is no access origin having an allocation.
6 . The cache apparatus according to claim 3 , further comprising a unit for notifying an error to an access origin allocated with an accessed area when the error occurred during an access made to the cache memory, or notifying the error to a predetermined access origin when there is no access origin having an allocation.
7 . The cache apparatus according to claim 4 , wherein the unit notifies the error to a predetermined access origin out of a plurality of access origins, when the plurality of access origins having the allocations exist or when the plurality of access origins having the allocations do not exist but there are a plurality of access origins.
8 . The cache apparatus according to claim 5 , wherein the unit notifies the error to a predetermined access origin out of a plurality of access origins, when the plurality of access origins having the allocations exist or when the plurality of access origins having the allocations do not exist but there are a plurality of access origins.
9 . The cache apparatus according to claim 6 , wherein the unit notifies the error to a predetermined access origin out of a plurality of access origins, when the plurality of access origins having the allocations exist or when the plurality of access origins having the allocations do not exist but there are a plurality of access origins.
10 . A cache method for enabling a plurality of access origins to make access to a cache memory, the cache method comprising:
a step for setting a cache capacity into which each access origin can charge data; a step for charging data into an area within the set cache capacity in response to a request from each access origin based on the cache capacity; and a step for reading data from the cache memory and notifying the data without depending on the set cache capacity when each access origin has made a reference request.
11 . The cache method according to claim 10 , further comprising a step for automatically adjusting the cache capacity into which data can be charged.
12 . The cache method according to claim 10 , further comprising a step for measuring a frequency that each of the plurality of access origins makes access to the cache memory, wherein the frequency of making access to the cache memory is a frequency of making reference to the cache memory.Join the waitlist — get patent alerts
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