LSI device capable of adjusting the output impedance to match the characteristic impedance

Abstract

According to an aspect of the present invention there is provided an LSI device having an output terminal outputting a data, comprising a data output circuit connected to the output terminal and capable of adjusting an output impedance thereof; and an adjustment circuit which detects a transient voltage at the output terminal when an output logic of the data output circuit is switched in a condition that a transmission line not terminated by a terminating resistor is connected to the output terminal, compares the transient voltage with a reference voltage, and adjusts the output impedance of the data output circuit so as to match a characteristic impedance of the transmission line. According to the present invention, as the transient voltage of the output terminal connected to the transmission line is detected, and the output impedance of the data output circuit is adjusted, it is possible to adjust so that output impedance of the data output circuit is matched with characteristic impedance of the transmission line even if manufacture processes, use temperatures, power supply voltages, characteristic impedance of the transmission line, or the like fluctuates or is changed.

What is claimed is:  
     
         1 . An LSI device having an output terminal outputting a data, comprising: 
 a data output circuit connected to the output terminal and capable of adjusting an output impedance thereof; and    an adjustment circuit which detects a transient voltage at the output terminal when an output logic of the data output circuit is switched in a condition that a transmission line not terminated by a terminating resistor is connected to the output terminal, compares the transient voltage with a reference voltage, and adjusts the output impedance of the data output circuit so as to match a characteristic impedance of the transmission line.    
     
     
         2 . An LSI device according to  claim 1 , wherein 
 the transient voltage is generated in a period from an output from the output terminal of an output signal of the data output circuit till a return of the output signal to the output terminal as a result of reflection at a terminal end of the transmission line, the transient voltage being a voltage between a ground level and an amplitude level of the output signal.    
     
     
         3 . An LSI device according to  claim 1 , wherein 
 the data output circuit includes a plurality of transistors connected in parallel with one another, and wherein 
 the adjustment circuit selectively activates the plurality of transistors to adjust the output impedance of the data output circuit.  
   
     
     
         4 . An LSI device having an output terminal outputting a data, a dummy output terminal outputting a dummy data, and a dummy input terminal which accepts the dummy data through a dummy transmission line, the LSI device comprising: 
 a data output circuit connected to the output terminal and capable of adjusting an output impedance thereof;    a dummy output circuit connected to the dummy output terminal and having a configuration equivalent to that of the data output circuit; and    an adjustment circuit which detects a transient voltage at the dummy output terminal when an output logic of the dummy data output circuit is switched in a condition that the dummy transmission line is connected between the dummy output terminal and the dummy input terminal, compares the transient voltage with a reference voltage, and adjusts the output impedance of the data output circuit and of the dummy output circuit so as to match a characteristic impedance of the dummy transmission line.    
     
     
         5 . An LSI device according to  claim 4 , wherein 
 the transient voltage is detected at a timing when a logic of a signal fed to the dummy input terminal is switched at the dummy input terminal, the transient voltage being a voltage between a ground level and an amplitude of the output signal.    
     
     
         6 . An LSI device according to  claim 4 , wherein 
 the data output circuit and the dummy output circuit each include a plurality of transistors connected in parallel with one another, and wherein 
 the adjustment circuit selectively activates the plurality of transistors to adjust the output impedance of the data output circuit and of the dummy output circuit.  
   
     
     
         7 . An LSI device according to  claim 4 , wherein 
 the dummy transmission line has a signal delay time substantially equal to that of the transmission line connected to the output terminal.