Semiconductor exposure apparatus and device manufacturing method using the same

Abstract

In a semiconductor exposure apparatus, when a trouble such as a wafer chuck error which requires operator's action in the chamber occurs, execution or interruption of the exposure sequence is determined on the basis of the situation of the exposure sequence, and unlock of the door of the chamber is controlled on the basis of the determination result. After the error is eliminated, lock of the door is controlled, and the exposure sequence is resumed. By eliminating human factors in operation and making the time required for restoration as short as possible, the interruption time of the semiconductor exposure apparatus is minimized to improve the operation efficiency of the manufacturing line.

What is claimed is:  
     
         1 . A semiconductor exposure apparatus comprising: 
 determination means for determining a start or interruption of an exposure sequence; and    control means for controlling to lock and unlock a door of a chamber of said semiconductor exposure apparatus in accordance with the determination result.    
     
     
         2 . The apparatus according to  claim 1 , wherein said control means unlocks the door of the chamber when the exposure sequence is interrupted due to an error.  
     
     
         3 . The apparatus according to  claim 1 , wherein said control means locks the door of the chamber when the interrupted exposure sequence is to be resumed.  
     
     
         4 . The apparatus according to  claim 1 , wherein the door of the chamber comprises a wafer cassette exchange door.  
     
     
         5 . The apparatus according to  claim 1 , wherein the door of the chamber comprises a reticle cassette exchange door.  
     
     
         6 . A semiconductor exposure apparatus comprising: 
 means for determining whether or not an error generated during an exposure sequence can be eliminated by operation performed while keeping a door of a chamber of said semiconductor exposure apparatus open.    
     
     
         7 . A semiconductor exposure apparatus comprising: 
 means for detecting an error during a semiconductor exposure sequence; and    means for determining a level of the detected error.    
     
     
         8 . The apparatus according to  claim 7 , wherein unlock of the door of said semiconductor exposure apparatus is controlled on the basis of the determination result of the level of the detected error.  
     
     
         9 . The apparatus according to  claim 7 , wherein supply of a work to said semiconductor exposure apparatus is interrupted on the basis of the determination result of the level of the detected error.  
     
     
         10 . The apparatus according to  claim 9 , wherein the work comprises a wafer or a reticle.  
     
     
         11 . The apparatus according to  claim 8 , wherein when a work is being processed, the door is unlocked after processing of the work ends.  
     
     
         12 . The apparatus according to  claim 11 , wherein the work comprises a wafer or a reticle.  
     
     
         13 . The apparatus according to  claim 6 , further comprising 
 unlock means for, on the basis of the determination result, interrupting the exposure sequence and then unlocking the door of the chamber of said semiconductor exposure apparatus,    operation means for inputting an instruction for resuming the interrupted exposure sequence, and    resumption means for locking the door and then resuming the exposure sequence.    
     
     
         14 . The apparatus according to  claim 13 , further comprising notification means for notifying an operator that the door of the chamber of said semiconductor exposure apparatus is unlocked by said unlock means.  
     
     
         15 . The apparatus according to  claim 13 , wherein when the error is generated during wafer alignment or exposure processing, and the error does not adversely affect the processing, the interruption of the exposure sequence and unlock of the door by said unlock means are executed after exposure processing for all wafers is ended.  
     
     
         16 . A device manufacturing method using said exposure apparatus of  claim 1 , comprising the steps of: 
 preparing said exposure apparatus of  claim 1;  and    performing exposure using said exposure apparatus.    
     
     
         17 . A semiconductor exposure apparatus comprising: 
 means for detecting an open/closed state of a door of a process chamber of said semiconductor exposure apparatus;    means for controlling to lock the door on the basis of the detection result; and    means for determining an interruption or resumption of a process in accordance with a locked/unlocked state of the door.    
     
     
         18 . A semiconductor exposure apparatus comprising: 
 scattered light limiting means for limiting a path where scattered light of a laser beam leaks from said apparatus in a plane or a space having a specific shape containing a path along which an object to be exposed or a case storing the object to be exposed moves; and    loading/unloading means, engaging with the plane or space limited by said scattered light limiting means, for holding and moving the object to be exposed or the case while shielding the scattered light of the laser beam so as to load/unload the object to be exposed or the case between an internal space where the object to be exposed is irradiated with the laser beam and an external space.    
     
     
         19 . The apparatus according to  claim 17 , wherein 
 the object to be exposed comprises a reticle having a circuit pattern, and the object to be exposed is irradiated with the laser beam to transfer the circuit pattern to a photosensitive substrate.    
     
     
         20 . A device manufacturing method using said semiconductor exposure apparatus of  claim 17 , comprising the steps of: preparing said exposure apparatus of claim  17 ; and performing exposure using said exposure apparatus.