Reduction of electromagnetic interference in integrated circuit device packages

Abstract

EMI radiation in an integrated circuit device package ( 10 ) is reduced or eliminated by the introduction of a magnetic material into the encapsulating medium ( 14 ). The permeance of the magnetic encapsulating medium ( 14 ) affects the inherent series inductance of the lead frame conductors ( 16 ) to thereby reduce electromagnetic interference. Ferrite microbeads ( 30 ) are formed around the lead frame conductors ( 16 ) to contain the magnetic flux ( 32 ) generated by an electrical current signal and to attenuate the effects of mutual inductance.

1 . An integrated circuit comprising: 
 a wafer having circuitry disposed thereon;    a plurality of conductors coupled to the wafer;    a structure that encapsulates and supports the wafer; and    magnetic material disposed to alter an inductance associated with at least one of the plurality of conductors.    
     
     
         2 . The integrated circuit of  claim 1 , wherein the magnetic material is at least partially disposed within the structure.  
     
     
         3 . The integrated circuit of  claim 1 , wherein the magnetic material is substantially homogeneously disposed throughout the structure.  
     
     
         4 . The integrated circuit of  claim 1 , wherein at least a portion of the magnetic material is disposed external to the structure.  
     
     
         5 . The integrated circuit of  claim 1 , wherein the magnetic material comprises a ferromagnetic material.  
     
     
         6 . The integrated circuit of  claim 1 , wherein the magnetic material comprises a ferrite material.  
     
     
         7 . The integrated circuit of  claim 1 , further comprising at least one choke structure formed of the magnetic material, wherein each chock structure associates with at least one respective conductor of the plurality of conductors.  
     
     
         8 . The integrated circuit of  claim 1 , wherein the magnetic material forms a plurality of choke structures, each of the choke structures being associated with at least one respective conductor of the plurality of conductors  
     
     
         9 . The integrated circuit of  claim 7 , wherein the structure comprises a dielectric material encapsulating at least a portion of the choke structures.  
     
     
         10 . The integrated circuit of  claim 7 , wherein at least some of the choke structures are disposed external to the structure.