US2002190376A1PendingUtilityA1
Package having terminated plating layer and its manufacturing method
Est. expiryAug 26, 2019(expired)· nominal 20-yr term from priority
Inventors:Ryoji Sato
H10W 70/655H10W 70/635H10W 72/071H10W 74/129H10W 70/60H05K 3/242H05K 3/24
39
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Claims
Abstract
In a package for mounting a semiconductor device and a bump, an interposer substrate has a first surface for mounting the semiconductor device. A wiring layer capable of being connected to the semiconductor device, a terminal connected to the wiring layer for mounting the bump, and a plating layer are formed on a second surface of the interposer substrate. The plating layer is connected to one of the terminal and the siring layer. The plating layer is terminated within the interposer substrate
Claims
exact text as granted — not AI-modifiedWhat is claimed:
1 . A package for mounting a semiconductor device and a bump, comprising:
an interposer substrate having a first surface for mounting said semiconductor device; a wiring layer formed on a second surface of said interposer substrate capable of being connected to said semiconductor device; a terminal, formed on the second surface of said interposer substrate and connected to said wiring layer, for mounting said bump; a plating layer, formed on the second surface of said interposer substrate and connected to said wiring layer, said plating layer being terminated within said interposer substrate.
2 . The package as set forth in claim 1 , wherein said plating layer is connected to an end of said wiring layer opposite to said terminal.
3 . The package as set forth in claim 1 , wherein said plating layer is connected to a center portion of said wiring layer.
4 . The package as set forth in claim 1 , further comprising a ground plate terminated at an end of said package, said ground plate surrounding said wiring layer, said terminal and said plating layer.Join the waitlist — get patent alerts
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