Burn-in apparatus and semiconductor wafer

Abstract

A semiconductor wafer has a device zone and a peripheral edge zone. Semiconductor devices to be screened are formed in a matrix form on the device zone of the semiconductor wafer. A plurality of wires connected to the semiconductor devices are formed on the device and peripheral edge zones. In the device zone, the wires are formed among lines of the semiconductor devices. A burn-in apparatus comprises a holder, a thermal controller, a signal generator, and interconnection members. The holder holds a plurality of the semiconductor wafers in order to install them in a room. The thermal controller controls temperature in the room to heat the semiconductor wafers up to a predetermined temperature. The signal generator generates a test pattern signal for screening the semiconductor devices. Each of the interconnection members has a plurality of electrodes formed so as to contact the ends of the wires, and presses the electrodes into the wires to establish complete connection between the electrodes and the wires.

What is claimed is:  
     
         1 . A burn-in apparatus comprising: 
 a holder which holds plurality of semiconductor wafers each having an inner zone prepared for arranging thereon a plurality of semiconductor devices to be screened, and a peripheral edge zone around said inner zone, in order to install the plurality of semiconductor wafers in a room;    a thermal controller which controls temperature of the room so as to heat the plurality of said semiconductor wafers up to a predetermined temperature;    a signal generator which generates a test pattern signal for screening said semiconductor devices on the plurality of said semiconductor wafers which have been heated up to the predetermined temperature; and    interconnection members which electrically interconnects said signal generator and each of said semiconductor devices, in order to provide said semiconductor devices respectively with the signals generated by said signal generator.    
     
     
         2 . The burn-in apparatus according to  claim 1 , wherein said holder holds said semiconductor wafers each having a plurality of pathways which are formed across said inner and peripheral edge zones for supplying the test pattern signal to said semiconductor devices; and 
 each of said interconnection members has a plurality of electrodes being connected to said signal generator, and presses said electrodes so that said electrodes contact said pathways.    
     
     
         3 . The burn-in apparatus according to  claim 2 , wherein each of said interconnection members comprises; 
 a first board on which said semiconductor wafer is vacuum fixed; and    a second board which collaborates with said first board to provide said electrodes with pressure for making contact with said pathways.    
     
     
         4 . The burn-in apparatus according to  claim 3 , wherein the plurality of said electrodes are arranged so as to contact both ends of said pathways which are formed among lines of said matrix formed semiconductor devices on said semiconductor wafer.  
     
     
         5 . The burn-in apparatus according to  claim 4 , wherein the plurality of said electrodes are grouped by ends of said pathways being connected to, and said electrodes in the same group are connected to each other by wires while one of said electrodes in the group is connected to said signal generator.  
     
     
         6 . A semiconductor wafer comprising: 
 a device zone which is prepared for forming semiconductor devices thereon, and a peripheral zone which is prepared around said device zone;    a plurality of semiconductor devices which are formed on said device zone to be subjected to screening; and    a plurality of wires which are formed across said device and peripheral zones in order to supply signals for screening respectively to the plurality of said semiconductor devices, wherein said wires are straight while being parallel to each other in said device zone.    
     
     
         7 . The semiconductor wafer according to  claim 6 , wherein said wires extend straightly from said device zone to said peripheral zone.  
     
     
         8 . The semiconductor wafer according to  claim 6 , wherein said wires are formed so that intervals among ends of the wires on said peripheral zone are wider than intervals among said wires on said device zone.