US2002173069A1PendingUtilityA1

Mounting structure of semiconductor chip, semiconductor device and method of making the semiconductor device

Priority: Feb 7, 2000Filed: Feb 6, 2001Published: Nov 21, 2002
Est. expiryFeb 7, 2020(expired)· nominal 20-yr term from priority
H10W 90/754H10W 90/734H10W 90/724H10W 74/00H10W 72/07331H10W 72/5363H10W 72/951H10W 72/884H10W 72/856H10W 72/536H10W 72/075H10W 72/073H10W 90/701H10W 74/141H10W 74/129H10W 74/127H10W 74/114H10W 74/111H10W 74/15H10W 74/012H10W 74/40H10W 70/688H10W 72/071
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Claims

Abstract

The present invention provides a mounting structure of a semiconductor chip ( 3 ) onto an insulated substrate ( 2 ). The insulated substrate ( 2 ) is made of a polyimide resin, at least side surfaces ( 3 c ) of the semiconductor chip ( 3 ) is protected by a protective resin ( 5 ) provided by a polyimide resin. The semiconductor chip ( 3 ) is held by the protective resin ( 5 ) with respect to the insulated substrate ( 2 ). Preferably, an adhesive layer ( 4 ) is provided between the semiconductor chip ( 3 ) and the insulated substrate ( 2 ). The adhesive layer ( 4 ) is also provided by a polyimide resin.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A mounting structure of a semiconductor chip onto an insulated substrate, 
 the insulated substrate being made of a polyimide resin,    at least a side surface of the semiconductor chip being protected by a protective resin provided by a polyimide resin, the semiconductor chip being held by the protective resin with respect to the insulated substrate.    
     
     
         2 . The mounting structure according to  claim 1 , wherein the protective resin rides on an upper surface of the semiconductor chip.  
     
     
         3 . The mounting structure according to  claim 1 , wherein the protective resin seals the semiconductor chip entirely.  
     
     
         4 . The mounting structure according to  claim 1 , wherein an adhesive layer is provided between the semiconductor chip and the insulated substrate.  
     
     
         5 . The mounting structure according to  claim 4 , wherein the adhesive layer is provided by a polyimide resin.  
     
     
         6 . The mounting structure according to  claim 1 , wherein the insulated substrate has a peripheral margin extending beyond the semiconductor chip, the protective resin being formed to rise from the margin.  
     
     
         7 . The mounting structure according to  claim 1 , wherein the semiconductor chip has an electrode bearing surface formed with a plurality of electrodes, the insulated substrate being provided with external terminals disposed in a grid pattern, each made of a solder ball and electrically connected with a corresponding one of the electrodes.  
     
     
         8 . The mounting structure according to  claim 1 , wherein the electrode bearing surface is faced to the insulated substrate.  
     
     
         9 . The mounting structure according to  claim 1 , wherein the electrode bearing surface is faced away from the insulated substrate, the electrical connection of each electrode of the semiconductor chip with the corresponding external terminal being provided by a wire.  
     
     
         10 . A semiconductor device comprising: 
 an insulated substrate; and    a semiconductor chip mounted on the insulated substrate;    wherein the insulated substrate is made of a polyimide resin, and    wherein at least a side surface of the semiconductor chip is protected by a protective resin provided by a polyimide resin, the semiconductor chip being held by the protective resin with respect to the insulated substrate.    
     
     
         11 . The semiconductor device according to  claim 10 , wherein the protective resin rides on an upper surface of the semiconductor chip.  
     
     
         12 . The semiconductor device according to  claim 10 , wherein the protective resin seals the semiconductor chip entirely.  
     
     
         13 . The semiconductor device according to  claim 10 , wherein the semiconductor chip and the insulated substrate sandwich an adhesive layer in between.  
     
     
         14 . The semiconductor device according to  claim 10 , wherein the adhesive layer is provided by a polyimide resin.  
     
     
         15 . The semiconductor device according to  claim 10 , wherein the insulated substrate has a peripheral margin extending beyond the semiconductor chip, the protective resin being formed to rise from the margin.  
     
     
         16 . The semiconductor device according to  claim 10 , wherein the semiconductor chip has an electrode bearing surface formed with a plurality of electrodes, the insulated substrate being provided with external terminals disposed in a grid pattern, each made of a solder ball and electrically connected with a corresponding one of the electrodes.  
     
     
         17 . The semiconductor device according to  claim 10 , wherein the electrode bearing surface is faced to the insulated substrate.  
     
     
         18 . The semiconductor device according to  claim 10 , wherein the electrode bearing surface is faced away from the insulated substrate, the electrical connection of each electrode of the semiconductor chip with the corresponding external terminal being provided by a wire.  
     
     
         19 . A method of manufacturing a semiconductor device, comprising steps of: 
 mounting a semiconductor chip on an insulated substrate; and    covering at least a side surface of the semiconductor chip with a protective resin, thereby holding the semiconductor chip with respect to the insulated substrate;    characterized that the protective resin is formed by thermal imidization of a liquid polyamide precursor.    
     
     
         20 . The method according to  claim 19 , further comprising steps of: 
 forming a non-hardened or semi-hardened adhesive layer on the insulated substrate; and    pressing the semiconductor chip onto the insulated substrate under heat via the adhesive layer.    
     
     
         21 . The method according to claim  21 , wherein 
 ultrasonic wave is applied to the semiconductor chip when pressing the semiconductor chip onto the insulated substrate under heat via the adhesive layer.

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