US2002167056A1PendingUtilityA1

Insulated gate semiconductor device with control circuit

Priority: Mar 30, 2000Filed: Jun 26, 2002Published: Nov 14, 2002
Est. expiryMar 30, 2020(expired)· nominal 20-yr term from priority
Inventors:Kozo Sakamoto
H10D 84/403H03K 17/0828H03K 17/0406H03K 17/04206H03K 17/0822
34
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Claims

Abstract

An insulated gate semiconductor device with a control circuit can operate stable and at low power consumption. The insulated gate semiconductor device with a control circuit has a first insulated gate type semiconductor element and a control circuit controlling and the first insulated gate type semiconductor element on the same package, and at least three external terminals including an external gate terminal, an external first terminal and an external terminal provided for externally leading electrodes outside of the package. A first MOSFET having a source terminal electrically connected to the external first terminal, a first terminal of the first insulated gate semiconductor device, and a grounding terminal of the control unit. The external second terminal, a second terminal of the first insulated gate type semiconductor device and a second terminal of an enhancement type second insulated gate semiconductor element are connected electrically, the external gate terminal and a gate terminal of the enhancement type second insulated gate semiconductor element are connected electrically, a first voltage holding element are connected between the external gate terminal and a gate terminal of the first insulated gate type semiconductor element, a drain of the first MOSFET and a first terminal of the enhancement type second insulated gate semiconductor element are electrically connected between the first voltage holding element and the gate terminal of the first insulated gate semiconductor element and an output terminal of the control circuit and a gate of the first MOSFET are connected electrically.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . An insulated gate semiconductor device with a control circuit comprising: 
 a first insulated gate type semiconductor element and a control circuit controlling and said first insulated gate type semiconductor element on the same package;    at least three external terminals including an external gate terminal, an external first terminal and an external second terminal provided for externally leading electrodes outside of said package;    said external first terminal, a first terminal of said first insulated gate semiconductor element, a grounding terminal of said control unit and a source terminal of a first MOSFET being connected electrically;    said external second terminal, a second terminal of said first insulated gate type semiconductor element and a second terminal of an enhancement type second insulated gate semiconductor element being connected electrically;    said external gate terminal and a gate terminal of said enhancement type second insulated gate semiconductor element being connected electrically;    a first voltage holding element being connected between said external gate terminal and a gate terminal of said first insulated gate type semiconductor element;    a drain terminal of said first MOSFET and a first terminal of said enhancement type second insulated gate semiconductor element being electrically connected between said first voltage holding element and the gate terminal of said first insulated gate semiconductor element; and    an output terminal of said control circuit and a gate of said first MOSFET being connected electrically.    
     
     
         2 . An insulated gate semiconductor device with a control circuit comprising: 
 a first insulated gate type semiconductor element and a control circuit controlling and said first insulated gate type semiconductor element on the same package;    at least three external terminals including an external gate terminal, an external first terminal and an external second terminal provided for externally leading electrodes outside of said package;    said external first terminal, a first terminal of said first insulated gate semiconductor element, a grounding terminal of said control unit and a source terminal of a first MOSFET being connected electrically;    said external second terminal, a second terminal of said first insulated gate type semiconductor element and a second terminal of an enhancement type third insulated gate semiconductor element being connected electrically;    said external gate terminal and a gate terminal of said enhancement type second insulated gate semiconductor element being connected electrically;    a first voltage holding element being connected between said external gate terminal and a gate terminal of said first insulated gate type semiconductor element;    a drain terminal of said first MOSFET being electrically connected between said first voltage holding element and the gate terminal of said first insulated gate semiconductor element;    an output terminal of said control circuit and a gate of said first MOSFET being connected electrically; and    a first terminal of said enhancement type third insulated gate semiconductor element and a power source terminal of said control circuit being connected electrically.    
     
     
         3 . An insulated gate semiconductor device with a control circuit comprising: 
 a first insulated gate type semiconductor element and a control circuit controlling and said first insulated gate type semiconductor element on the same package;    at least three external terminals including an external gate terminal, an external first terminal and an external second terminal provided for externally leading electrodes outside of said package;    said external first terminal, a first terminal of said first insulated gate semiconductor element, a grounding terminal of said control unit and a source terminal of a first MOSFET being connected electrically;    said external second terminal, a second terminal of said first insulated gate type semiconductor element, a second terminal of an enhancement type second insulated gate semiconductor element and a second terminal of an enhancement type third insulated gate semiconductor element being connected electrically;    said external gate terminal, a gate terminal of said enhancement type second insulated gate semiconductor element, and a gate terminal of said enhancement type third insulated gate semiconductor element being connected electrically;    a first voltage holding element being connected between said external gate terminal and a gate terminal of said first insulated gate type semiconductor element;    a drain terminal of said first MOSFET and a first terminal of said enhancement type second insulated gate semiconductor element being electrically connected between said first voltage holding element and the gate terminal of said first insulated gate semiconductor element;    an output terminal of said control circuit and a gate of said first MOSFET being connected electrically; and    a first terminal of said enhancement type second insulated gate semiconductor element and a power source terminal of said control circuit being connected electrically.    
     
     
         4 . An insulated gate semiconductor device with a control circuit as set forth in  claim 1  or  3 , wherein an one-way current conducting element is provided between the first terminal of said enhancement type second insulated gate semiconductor element and the gate terminal of said first insulated gate semiconductor element.  
     
     
         5 . An insulated gate semiconductor device with a control circuit as set forth in  claim 1  or  3 , wherein a first voltage restricting element is provided between the first terminal and the gate terminal of said enhancement type insulated gate semiconductor element.  
     
     
         6 . An insulated gate semiconductor device with a control circuit as set forth in any one of claims  1  and  3 , wherein a second current restricting element is provided between the first terminal and the gate terminal of said enhancement type second insulated gate semiconductor element.  
     
     
         7 . An insulated gate semiconductor device with a control circuit as set forth in any one of  claims 1  to  3 , wherein 
 a second voltage holding element is provided between a first terminal of a fourth insulated gate semiconductor element and the external first terminal;  
 a gate terminal of said fourth insulated gate semiconductor element and said external gate terminal are connected electrically;  
 a second terminal of said fourth insulated gate semiconductor element and said external second terminal are connected electrically; and  
 means for increasing a drain current of said first MOSFET when a terminal voltage of said second voltage holding element, is provided.  
 
     
     
         8 . An insulated gate semiconductor device with a control circuit as set forth in any one of claims  1  and  3 , wherein said first insulated gate semiconductor element and said second insulated gate semiconductor device are MOS type semiconductor elements having a common drain region, body regions of said first insulated gate semiconductor element and said second insulated gate semiconductor element are separated by said drain region.  
     
     
         9 . An insulated gate semiconductor device with a control circuit as set forth in any one of claims  2  and  3 , wherein said first insulated gate semiconductor element and said third insulated gate semiconductor device are MOS type semiconductor elements having a common drain region, and body regions of said first insulated gate semiconductor element and said third insulated gate semiconductor element are separated by said drain region.  
     
     
         10 . An insulated gate semiconductor device with a control circuit as set forth in any one of claims  2  and  3 , wherein said first insulated gate semiconductor element and a second insulated gate semiconductor device are IGBT having common first conductivity type collector region and a second conductivity type base region, and first conductivity type body regions of said first insulated gate semiconductor element and said third insulated gate semiconductor element are separated by a second conductivity type base region.  
     
     
         11 . An insulated gate semiconductor device with a control circuit as set forth in any one of claims  2  and  3 , wherein said first insulated gate semiconductor element and a second insulated gate semiconductor device are IGBT having common first conductivity type collector region and a second conductivity type base region, and first conductivity type body regions of said first insulated gate semiconductor element and said third insulated gate semiconductor element are separated by a second conductivity type base region.  
     
     
         12 . An insulated gate semiconductor device with a control circuit as set forth in any one of claims  1  and  3 , wherein the body region of said second insulated gate semiconductor element and a semiconductor region of the first terminal are separately wired.  
     
     
         13 . An insulated gate semiconductor device with a control circuit as set forth in any one of claims  2  and  3 , wherein the body region of said third insulated gate semiconductor element and a semiconductor region of the first terminal are separately wired.  
     
     
         14 . A power switch system with a current restricting function drives a load by conducting and blocking control between said first terminal and said second terminal by an insulated gate semiconductor device with a control circuit as set forth in any one of  claims 1  to  3 .

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