Single transistor rare earth manganite ferroelectric nonvolatile memory cell

Abstract

A memory device is formed of the one transistor cell type. Such a device has a substrate, a ferroelectric layer which is a film of rare earth manganite, and an interfacial oxide layer being positioned between the substrate and the ferroelectric layer. The invention includes such a device and methods of making the same.

What is claimed is:  
     
         1 . A method of making a memory device, comprising: 
 providing a substrate;    providing a ferroelectric layer composed of a film of rare earth manganite;    providing an interfacial oxide layer having a rare earth oxide as a component in between the substrate and the ferroelectric layer; and    providing a gate electrode on the ferroelectric layer,    wherein said rare earth manganite film has the general formula A 3+ MnO x , where A=Y, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Th, Dy, Ho, Er, Tm, Yb, or Lu, and where x is between 1 and 3 inclusive.    
     
     
         2 . The method of  claim 1  wherein the gate electrode is formed with Pt.  
     
     
         3 . The method of  claim 1  wherein the gate electrode is formed with Ir, IrO 2 , RuO x , Ro, RoO x , or indium tin oxide (ITO).  
     
     
         4 . The method of  claim 1  wherein the gate electrode is formed with doped polycristalline silicon in a doping step.  
     
     
         5 . The method of  claim 4  with the doping step is performed during a polysilicon deposition step.  
     
     
         6 . The method of  claim 5  with the doping step performed after a deposition step.  
     
     
         7 . The method of  claim 1  wherein the gate electrode is formed with polycide.  
     
     
         8 . The method of  claim 1  further comprising a step of forming a source region and a drain region, with the source and drain region forming step being done prior to the ferroelectric layer providing step.  
     
     
         9 . The method of  claim 1  further comprising a step of forming a source region and a drain region, with this step being performed after the ferroelectric layer providing step.  
     
     
         10 . The method of  claim 1 , further comprising the step of activating a source and drain and a step of annealing the ferroelectric layer, these steps being performed simultaneously.  
     
     
         11 . The method of  claim 1  wherein the rare earth manganite film is deposited via metalorganic vapor deposition.  
     
     
         12 . The method of  claim 1  wherein the rare earth manganite film is annealed in oxygen at temperatures of about 800<T<950 C. after the ferroelectric layer deposition step.  
     
     
         13 . The method of  claim 1  wherein the interfacial oxide layer is grown automatically during the providing of the rare earth manganite film step, or during a subsequent anneal cycle in oxygen step.  
     
     
         14 . The method of  claim 1  wherein the interfacial oxide layer is grown deliberately prior to the rare earth manganite film providing step.  
     
     
         15 . The method of  claim 1  wherein the interfacial layer is composed of silicon, oxygen and at least one of the elements of the rare earth manganite film in the formula Si x O y ,A z  where A is being selected from the group A=Y, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Th, Dy, Ho, Er, Tm, Yb or Lu and x is between 0 and 2, y is between 1 and 3, and z is between 0 and all inclusive.  
     
     
         16 . The method of  claim 1  wherein gate electrode, rare earth manganite film and interfacial layer are patterned using standard photolithography and etching techniques and using a stack of gate the electrode, the rare earth manganite film and the interfacial layer as the implantation mask.  
     
     
         17 . The method of  claim 1  wherein the relative dielectric permittivity of the rare earth manganite film is less than 30.  
     
     
         18 . The method of  claim 1 , further comprising a step of encapsulating the ferroelectric layer and the interfacial oxide layer in a protective layer to prevent out-diffusion of the rare earth elements and the manganese, and comprising the step of forming a standard, non ferroelectric CMOS transistors in connection with the substrate.  
     
     
         19 . The method of  claim 1  further comprising a step of forming a standard, non ferroelectric CMOS transistor in connection with the substrate and where the standard, non ferroelectric CMOS transistor is encapsulated with a protective layer to prevent contamination from the rare earth elements and the manganese coming from the ferroelectric layer and the interfacial oxide layer.  
     
     
         20 . A memory device comprising: 
 a substrate;    a ferroelectric layer, said layer being a film of rare earth manganite;    and an interfacial oxide layer being positioned between the substrate and the ferroelectric layer.    
     
     
         21 . The device of  claim 20 , wherein the ferroelectric layer has the general formula A 3+ MnO x , (where A=Y, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, or Lu) and x is between 1 and 3 inclusive.  
     
     
         22 . The device of  claim 21 , wherein A is Ce.