US2002160602A1PendingUtilityA1

Method for forming metal wiring layer

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Mar 21, 2001Filed: Jun 18, 2002Published: Oct 31, 2002
Est. expiryMar 21, 2021(expired)· nominal 20-yr term from priority
H10P 14/432H10P 14/412H10W 20/0425H10W 20/065H10W 20/059H10W 20/057H10W 20/045H10W 20/033H10W 20/048H10D 64/011
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Claims

Abstract

A method is provided for forming a metal wiring layer of a semiconductor device, which is performed in an airtight space, the pressure of which is maintained below atmospheric pressure, to form a metal deposition prevention layer. An interlayer dielectric layer pattern is formed on a semiconductor substrate so as to define a hole region. A metal film is formed on the top surface of the interlayer dielectric layer pattern under a vacuum state so as to expose the side walls of the hole region. The metal layer is oxidized in the airtight space, the pressure of which is maintained below atmospheric pressure in an oxygen atmosphere, thereby forming a metal deposition prevention layer. A metal liner is selectively formed at the side walls of the hole region. A metal layer is formed inside the hole region defined by the metal liner and on the metal deposition prevention layer. The metal liner is heat-treated and reflowed.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A method for forming a metal wiring layer comprising the steps of: 
 forming a first metal layer to cover predetermined portions of an exposed surface of a semiconductor substrate;    forming a metal deposition prevention layer by oxidizing the first metal layer in an oxygen atmosphere in airtight space, the pressure of which is maintained below atmospheric pressure; and    forming a second metal layer to cover other portions of the exposed surface of the semiconductor substrate.    
     
     
         2 . The method for forming a metal wiring layer of  claim 1 , wherein the first metal layer is formed of Al, Ti, or Ta.  
     
     
         3 . The method for forming a metal wiring layer of  claim 1 , wherein the first metal layer is formed by direct current magnetron sputtering.  
     
     
         4 . The method for forming a metal wiring layer of  claim 1 , wherein the step of forming a metal deposition prevention layer by oxidizing the first metal layer is performed under an O 2  gas atmosphere.  
     
     
         5 . The method for forming a metal wiring layer of  claim 4 , wherein the step of forming a metal deposition prevention layer by oxidizing the first metal layer is performed at a O 2  gas partial pressure no greater than 1 Torr.  
     
     
         6 . The method for forming a metal wiring layer of  claim 1 , wherein the step of forming a metal deposition prevention layer by oxidizing the first metal layer is performed at a temperature between room temperature and 200° C.  
     
     
         7 . The method for forming a metal wiring layer of  claim 1 , wherein the step of forming a metal deposition prevention layer by oxidizing the first metal layer is performed under a mixed gas atmosphere of an oxygen-based gas and an inert gas.  
     
     
         8 . The method for forming a metal wiring layer of  claim 7 , wherein the oxygen-based gas is O 2 , O 3 , or N 2 O.  
     
     
         9 . The method for forming a metal wiring layer of  claim 1 , further comprising the step of moving the semiconductor substrate including the first metal layer into an airtight space without breaking a vacuum state between the step of forming the first metal layer and the step of forming the metal deposition prevention layer.  
     
     
         10 . The method for forming a metal wiring layer of  claim 9 , wherein the airtight space is formed in a reaction chamber which is capable of vacuum air exhaustion.  
     
     
         11 . The method for forming a metal wiring layer of  claim 9 , wherein the airtight space is formed in a load lock chamber which is installed in a cluster tool type semiconductor manufacturing apparatus and is capable of vacuum air exhaustion.  
     
     
         12 . The method for forming a metal wiring layer of  claim 1 , wherein the step of forming the second metal layer comprises the step of: 
 forming a metal liner on the other portions of the exposed surface of the semiconductor substrate; and    forming a third metal layer, which is planarized, on the metal liner.    
     
     
         13 . The method for forming a metal wiring layer of  claim 12 , wherein the metal liner is formed by chemical vapor deposition.  
     
     
         14 . The method for forming a metal wiring layer of  claim 12 , wherein the metal liner is comprised of a monolayer consisting of one metal layer or a double layer consisting of two metal layers.  
     
     
         15 . The method for forming a metal wiring layer of  claim 14 , wherein the metal liner includes a copper layer or an aluminum layer.  
     
     
         16 . The method for forming a metal wiring layer of  claim 14 , wherein the metal liner is comprised of a monolayer consisting of an aluminum layer.  
     
     
         17 . The method for forming a metal wiring layer of  claim 16 , wherein the metal liner is formed by selective metal organic chemical vapor deposition using a precursor of one of dimethylaluminum hydride, trimethylamine alane, dimethylethylamine alane, and methylpyrrolidine alane.  
     
     
         18 . The method for forming a metal wiring layer of  claim 12 , wherein the metal liner is formed to have a thickness of 10-200 Å.  
     
     
         19 . The method for forming a metal wiring layer of  claim 12 , wherein the third metal layer is formed of one of aluminum and aluminum alloy.

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