Semiconductor device having capacitor which assures sufficient capacity without requiring large space and method of producing the same

Abstract

In a semiconductor device comprising first and second layer wirings formed with a space left therebetween and a capacitor formed in the space and electrically connected to the first and the second layer wirings, the capacitor comprises a via electrically connected to one of the first and the second layer wirings, an electrode made of a conductive material and electrically connected to the one of the first and the second layer wirings through the via, and a dielectric film formed between the electrode and the other of the first and the second layer wirings.

What is claimed is:  
     
         1 . A semiconductor device comprising first and second layer wirings formed with a space left therebetween and a capacitor formed in said space and electrically connected to said first and said second layer wirings; 
 wherein said capacitor comprises a via electrically connected to one of said first and said second layer wirings, an electrode made of a conductive material and electrically connected to said one of said first and said second layer wirings through said via, and a dielectric film formed between said electrode and the other of said first and said second layer wirings.    
     
     
         2 . A semiconductor device as claimed in  claim 1 , wherein said one of said first and said second layer wirings is an upper layer wiring; 
 the other of said first and said second layer wirings being a lower layer wiring.    
     
     
         3 . A semiconductor device as claimed in  claim 2 , wherein said electrode is electrically connected to said upper layer wiring through said via; 
 said capacitor further comprising an additional via electrically connected to said lower layer wiring and an additional electrode electrically connected to said lower layer wiring through said additional via;    said dielectric film being formed between said electrode and said additional electrode.    
     
     
         4 . A semiconductor device as claimed in  claim 1 , wherein said via is constructed by a plurality of via-pieces; 
 said via-pieces being formed by driving in tacks.    
     
     
         5 . A semiconductor device as claimed in  claim 2 , wherein said one of said first and said second layer wirings is a power supply wiring; 
 the other of said first and said second layer wirings being a grounding wiring;    said capacitor being formed where said power supply and said grounding wirings intersect to each other, respectively.    
     
     
         6 . A semiconductor device as claimed in  claim 2 , wherein said one and the other layer wirings are constructed by a plurality of pairs of a power supply wiring and a grounding wiring alternatively arranged on each other along said one and the other layer wirings, respectively; 
 said capacitor being formed where said power supply and said grounding wirings intersect to each other, respectively;    the capacitors being electrically connected in parallel to one another.    
     
     
         7 . A semiconductor device as claimed in  claim 1 , wherein said dielectric film is made by at least one high dielectric film selected from the group consisting of an oxide film, a nitride film, a tantalum oxide film, and a barium strontium titanate (BST) film.  
     
     
         8 . A method of producing a semiconductor device comprising first and second layer wirings formed with a space left therebetween and a capacitor formed in said space and electrically connected to said first and said second layer wirings, wherein said method comprises the steps of: 
 forming said lower layer wiring, said lower layer wiring serving as a lower electrode of said capacitor;    forming a dielectric film on said lower electrode;    forming an upper electrode of said capacitor on said dielectric film;    forming a via so as to be electrically connected to said upper electrode; and    forming said upper layer wiring so as to be electrically connected to said via.    
     
     
         9 . A method of producing a semiconductor device comprising first and second layer wirings formed with a space left therebetween and a capacitor formed in said space and electrically connected to said first and said second layer wirings, wherein said method comprises the steps of: 
 forming said lower layer wiring;    forming a via so as to be electrically connected to said lower layer wiring;    forming a lower electrode of said capacitor so as to be electrically connected to a via;    forming a dielectric film on said lower electrode;    forming an upper electrode of said capacitor on said dielectric film;    forming an additional via so as to be electrically connected to said upper electrode; and    forming said upper layer wiring so as to be electrically connected to said additional via.    
     
     
         10 . A method of producing a semiconductor device comprising first and second layer wirings formed with a space left therebetween and a capacitor formed in said space and electrically connected to said first and said second layer wirings, wherein said method comprises the steps of: 
 forming said lower layer wiring;    forming a via so as to be electrically connected to said lower layer wiring;    forming a lower electrode of said capacitor so as to be electrically connected to said via;    forming a dielectric film on said lower electrode;    forming an upper electrode of said capacitor on said dielectric film; and    forming said upper layer wiring so as to be electrically connected to said upper electrode.    
     
     
         11 . A method of producing a semiconductor device as claimed in  claim 8  or  10 , wherein said via is formed by a single or a dual damascene process.  
     
     
         12 . A method of producing a semiconductor device as claimed in  claim 9 , wherein said via and said additional via are formed by a single or a dual damascene process.